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DMP3010LPS-13

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Diodes Incorporated MOSFETs, TDFN-8(5.2x5.9). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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DMP3010LPS-13

Diodes Incorporated · MOSFETs · TDFN-8(5.2x5.9)

DMP3010LPS-13 from Diodes Incorporated, in a TDFN-8(5.2x5.9). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 S passive Source of the P-channel MOSFET, one of three source pins on the left side of the top-view pin configuration (pin 1 marked by the dot).
2 S passive Source of the P-channel MOSFET, one of three source pins on the left side of the top-view pin configuration.
3 S passive Source of the P-channel MOSFET, one of three source pins on the left side of the top-view pin configuration.
4 G input Gate of the P-channel MOSFET, with VGSS rated ±20V and threshold of -1.1V to -2.1V at ID = -250µA.
5 D passive Drain of the P-channel MOSFET (VDSS -30V), one of four drain pins on the right side of the top-view pin configuration.
6 D passive Drain of the P-channel MOSFET (VDSS -30V), one of four drain pins on the right side of the top-view pin configuration.
7 D passive Drain of the P-channel MOSFET (VDSS -30V), one of four drain pins on the right side of the top-view pin configuration.
8 D passive Drain of the P-channel MOSFET (VDSS -30V), one of four drain pins on the right side of the top-view pin configuration.
9 EP passive Exposed pad (from the footprint; not named in the datasheet pin table).

Key specifications

Parameter Value
Manufacturer Diodes Incorporated
Package TDFN-8(5.2x5.9)
Category Triode/MOS Tube/Transistor
Pins 9

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Drain-Source Breakdown Voltage BVDSS -30 V VGS = 0V, ID = -250µA 2
Zero Gate Voltage Drain Current IDSS -1 μA VDS = -30V, VGS = 0V 2
Gate-Source Leakage IGSS -100 100 nA VGS = ±20V, VDS = 0V 2
Gate Threshold Voltage VGS(TH) -1.1 -1.6 -2.1 V VDS = VGS, ID = -250µA 2
Static Drain-Source On-Resistance RDS(ON) 5.7 7.5 mΩ VGS = -10V, ID = -10A 2
Static Drain-Source On-Resistance RDS(ON) 7.2 10 mΩ VGS = -4.5V, ID = -10A 2
Diode Forward Voltage VSD -0.65 -1 V VGS = 0V, IS = -1A 2
Drain-Source Voltage VDSS -30 V TA = +25°C 2
Gate-Source Voltage VGSS -20 20 V TA = +25°C 2
Continuous Drain Current (Note 7) ID -36 A VGS = -10V, Steady State, TA = +25°C 2
Continuous Drain Current (Note 7) ID -29 A VGS = -10V, Steady State, TA = +70°C 2
Continuous Drain Current (Note 7) ID -31 A VGS = -4.5V, Steady State, TA = +25°C 2
Continuous Drain Current (Note 7) ID -25 A VGS = -4.5V, Steady State, TA = +70°C 2
Continuous Drain Current (Note 6) ID -14.5 A VGS = -10V, Steady State, TA = +25°C 2
Continuous Drain Current (Note 6) ID -11.5 A VGS = -10V, Steady State, TA = +70°C 2
Pulsed Drain Current (Notes 6 & 9) IDM -100 A 2
Avalanche Current (Notes 10 & 11) IAS -17.5 A 2
Avalanche Energy (Notes 10 & 11) EAS 153 mJ L = 1mH 2
Operating and Storage Temperature Range TJ, TSTG -55 150 °C 2
Power Dissipation (Note 5) PD 1.26 W 2
Thermal Resistance, Junction to Ambient (Note 5) RθJA 97 °C/W TA = +25°C 2
Power Dissipation (Note 6) PD 2.18 W 2
Thermal Resistance, Junction to Ambient (Note 6) RθJA 55 °C/W TA = +25°C 2
Power Dissipation (Note 7) PD 14.37 W 2
Thermal Resistance, Junction to Ambient (Note 7) RθJA 8.7 °C/W TA = +25°C 2
Power Dissipation (Notes 7 & 8) PD 58.7 W 2
Thermal Resistance, Junction to Case (Notes 7 & 8) RθJC 2.13 °C/W TC = +25°C 2
Forward Transfer Admittance /Yfs/ 30 S VDS = -15V, ID = -10A 2
Input Capacitance Ciss 6234 pF VDS = -15V, VGS = 0V, f = 1.0MHz 2
Output Capacitance Coss 1500 pF VDS = -15V, VGS = 0V, f = 1.0MHz 2
Reverse Transfer Capacitance Crss 774 pF VDS = -15V, VGS = 0V, f = 1.0MHz 2
Gate Resistance Rg 1.28 Ω VDS = 0V, VGS = 0V, f = 1MHz 2
Total Gate Charge (VGS = -10V) Qg 126.2 nC VDS = -15V, ID = -10A 2
Total Gate Charge (VGS = -4.5V) Qg 59.2 nC VDS = -15V, VGS = -4.5V, ID = -10A 2
Gate-Source Charge Qgs 16.1 nC VDS = -15V, VGS = -4.5V, ID = -10A 2
Gate-Drain Charge Qgd 15.7 nC VDS = -15V, VGS = -4.5V, ID = -10A 2
Turn-On Delay Time tD(ON) 11.4 ns VDS = -15V, VGEN = -10V, RG = 6Ω, ID = -1A 2
Turn-On Rise Time tR 9.4 ns VDS = -15V, VGEN = -10V, RG = 6Ω, ID = -1A 2
Turn-Off Delay Time tD(OFF) 260.7 ns VDS = -15V, VGEN = -10V, RG = 6Ω, ID = -1A 2
Turn-Off Fall Time tF 99.3 ns VDS = -15V, VGEN = -10V, RG = 6Ω, ID = -1A 2

Materials and finish

As the datasheet states them (page.json metadata.appearance; the 3D model's colours follow it).

Part Material Colour / plating Datasheet says Page
contacts Copper tin  Terminal Connections: See Diagram Below  Terminals: Finish, 100% Matte Tin Annealed over Copper 1

CAD (KiCad official)

  • Symbol: DMP3010LPS-13
  • Footprint: Package_DFN_QFN:DFN-S-8-1EP_6x5mm_P1.27mm
  • 3D model: TDFN-8(5.2x5.9) (KiCad packages3D, STEP)
  • 3D model files: dmp3010lps-13-etched.step / dmp3010lps-13-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); dmp3010lps-13.step / dmp3010lps-13.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Diodes Incorporated datasheet (7 pp, sha256 2547fd365b05e10b, retrieved 2026-10-22, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (text+vision), consensus claude-opus-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF