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DMP2040UVT-7
Public Made by Adomby adom
Diodes Incorporated MOSFETs, TSOT-26. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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DMP2040UVT-7
Diodes Incorporated · MOSFETs · TSOT-26
DMP2040UVT-7 from Diodes Incorporated, in a TSOT-26. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | D | passive | Drain, connected to pins 2, 5 and 6, rated for VDSS of -20V and continuous drain current of -5.5A at TA=+25°C. |
| 2 | D | passive | Drain, connected to pins 1, 5 and 6, rated for VDSS of -20V and pulsed drain current IDM of -40A. |
| 3 | G | input | Gate, with a maximum gate-source voltage of ±12V and a threshold of -0.6V to -1.5V. |
| 4 | S | passive | Source, with a continuous source-drain diode current of -2.2A. |
| 5 | D | passive | Drain, connected to pins 1, 2 and 6, rated for VDSS of -20V with RDS(ON) of 38mΩ max at VGS=-4.5V. |
| 6 | D | passive | Drain, connected to pins 1, 2 and 5, rated for VDSS of -20V with RDS(ON) of 52mΩ max at VGS=-2.5V. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Diodes Incorporated |
| Package | TSOT-26 |
| Category | Triode/MOS Tube/Transistor |
| Pins | 6 |
Materials and finish
As the datasheet states them (page.json metadata.appearance; the 3D model's colours follow it).
| Part | Material | Colour / plating | Datasheet says | Page |
|---|---|---|---|---|
| housing | PC | Body Diode Reverse Recovery Charge QRR, 2.7, nC IF = -8.9A, di/dt = -100A/μs Notes: 5. Device mounted on FR-4 PC board, with minimum recommended pad layout, single sided. | 2 | |
| contacts | Copper | tin | Terminal Connections: See Diagram Terminals: Finish - Matte Tin Annealed over Copper Leadframe; | 1 |
CAD (KiCad official)
- Symbol:
DMP2040UVT-7 - Footprint:
Package_TO_SOT_SMD:TSOT-23-6 - 3D model: TSOT-26 (KiCad packages3D, STEP)
- 3D model files:
dmp2040uvt-7-etched.step/dmp2040uvt-7-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);dmp2040uvt-7.step/dmp2040uvt-7.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Diodes Incorporated datasheet (7 pp, sha256
439fd6034438b412, retrieved 2026-10-27, tier: manufacturer) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-sonnet-5-5(text+vision), consensusclaude-opus-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# DMP2040UVT-7
**Diodes Incorporated** · MOSFETs · TSOT-26
DMP2040UVT-7 from Diodes Incorporated, in a TSOT-26. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | D | passive | Drain, connected to pins 2, 5 and 6, rated for VDSS of -20V and continuous drain current of -5.5A at TA=+25°C. |
| 2 | D | passive | Drain, connected to pins 1, 5 and 6, rated for VDSS of -20V and pulsed drain current IDM of -40A. |
| 3 | G | input | Gate, with a maximum gate-source voltage of ±12V and a threshold of -0.6V to -1.5V. |
| 4 | S | passive | Source, with a continuous source-drain diode current of -2.2A. |
| 5 | D | passive | Drain, connected to pins 1, 2 and 6, rated for VDSS of -20V with RDS(ON) of 38mΩ max at VGS=-4.5V. |
| 6 | D | passive | Drain, connected to pins 1, 2 and 5, rated for VDSS of -20V with RDS(ON) of 52mΩ max at VGS=-2.5V. |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Diodes Incorporated |
| Package | TSOT-26 |
| Category | Triode/MOS Tube/Transistor |
| Pins | 6 |
## Materials and finish
As the datasheet states them (page.json `metadata.appearance`; the 3D model's colours follow it).
| Part | Material | Colour / plating | Datasheet says | Page |
|---|---|---|---|---|
| housing | PC | | Body Diode Reverse Recovery Charge QRR, 2.7, nC IF = -8.9A, di/dt = -100A/μs Notes: 5. Device mounted on FR-4 PC board, with minimum recommended pad layout, single sided. | 2 |
| contacts | Copper | tin | Terminal Connections: See Diagram Terminals: Finish - Matte Tin Annealed over Copper Leadframe; | 1 |
## CAD (KiCad official)
- Symbol: `DMP2040UVT-7`
- Footprint: `Package_TO_SOT_SMD:TSOT-23-6`
- 3D model: TSOT-26 (KiCad packages3D, STEP)
- 3D model files: `dmp2040uvt-7-etched.step` / `dmp2040uvt-7-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `dmp2040uvt-7.step` / `dmp2040uvt-7.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [Diodes Incorporated datasheet](https://www.diodes.com/assets/Datasheets/DMP2040UVT-7.pdf) (7 pp, sha256 `439fd6034438b412`, retrieved 2026-10-27, tier: manufacturer)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-sonnet-5-5` (text+vision), consensus `claude-opus-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/dmp2040uvt-7-datasheet.pdf)