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DMP2040UVT-13

Diodes Incorporated · MOSFETs · TSOT-26

DMP2040UVT-13 from Diodes Incorporated, in a TSOT-26. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 D passive Drain, connected internally with pins 2, 5 and 6; rated for VDSS of -20V and continuous ID of -5.5A at TA = +25°C.
2 D passive Drain, connected internally with pins 1, 5 and 6; rated for VDSS of -20V and continuous ID of -5.5A at TA = +25°C.
3 G input Gate, with maximum gate-source voltage of ±12V and threshold VGS(TH) of -0.6V to -1.5V.
4 S passive Source, with continuous source-drain diode current of -2.2A.
5 D passive Drain, connected internally with pins 1, 2 and 6; rated for VDSS of -20V and pulsed IDM of -40A.
6 D passive Drain, connected internally with pins 1, 2 and 5; rated for VDSS of -20V and pulsed IDM of -40A.

Key specifications

Parameter Value
Manufacturer Diodes Incorporated
Package TSOT-26
Category Transistors/Thyristors
Pins 6

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Drain-Source Voltage VDSS -20 V TA = +25°C 2
Gate-Source Voltage VGSS -12 12 V TA = +25°C 2
Continuous Drain Current (Note 6) ID -5.5 A VGS = -4.5V, Steady State, TA = +25°C 2
Continuous Drain Current (Note 6) ID -4.5 A VGS = -4.5V, Steady State, TA = +70°C 2
Continuous Drain Current (Note 7) ID -13 A VGS = -4.5V, Steady State, TC = +25°C 2
Continuous Drain Current (Note 7) ID -10 A VGS = -4.5V, Steady State, TC = +70°C 2
Pulsed Drain Current IDM -40 A 10μs Pulse, Duty Cycle = 1% 2
Continuous Source-Drain Diode Current (Note 6) IS -2.2 A 2
Avalanche Current IAS -16 A L = 0.1mH 2
Avalanche Energy EAS 13.5 mJ L = 0.1mH 2
Total Power Dissipation (Note 5) PD 1.2 W TA = +25°C 2
Thermal Resistance, Junction to Ambient (Note 5) RθJA 105 °C/W Steady State 2
Total Power Dissipation (Note 6) PD 1.5 W TA = +25°C 2
Thermal Resistance, Junction to Ambient (Note 6) RθJA 80 °C/W Steady State 2
Thermal Resistance, Junction to Case (Note 7) RθJC 16 °C/W Steady State 2
Operating and Storage Temperature Range TJ, TSTG -55 150 °C 2
Drain-Source Breakdown Voltage BVDSS -20 V VGS = 0V, ID = -250µA 2
Zero Gate Voltage Drain Current IDSS -1 µA VDS = -16V, VGS = 0V 2
Gate-Source Leakage IGSS -100 100 nA VGS = ±12V, VDS = 0V 2
Gate Threshold Voltage VGS(TH) -0.6 -1.5 V VDS = VGS, ID = -250µA 2
Static Drain-Source On-Resistance RDS(ON) 27 38 mΩ VGS = -4.5V, ID = -8.9A 2
Static Drain-Source On-Resistance RDS(ON) 38 52 mΩ VGS = -2.5V, ID = -6.9A 2
Diode Forward Voltage VSD -0.7 -1.2 V VGS = 0V, IS = -2.9A 2
Input Capacitance Ciss 834 pF VDS = -10V, VGS = 0V, f = 1.0MHz 2
Output Capacitance Coss 133 pF VDS = -10V, VGS = 0V, f = 1.0MHz 2
Reverse Transfer Capacitance Crss 105 pF VDS = -10V, VGS = 0V, f = 1.0MHz 2
Gate Resistance RG 4.9 Ω VDS = 0V, VGS = 0V, f = 1.0MHz 2
Total Gate Charge (VGS = -4.5V) Qg 8.6 nC VDS = -6V, ID = -8.9A 2
Total Gate Charge (VGS = -8V) Qg 19 nC VDS = -6V, ID = -8.9A 2
Gate-Source Charge Qgs 1.5 nC VDS = -6V, ID = -8.9A 2
Gate-Drain Charge Qgd 2.5 nC VDS = -6V, ID = -8.9A 2
Turn-On Delay Time tD(ON) 5.8 ns VDD = -6V, RL = 6Ω, VGS = -4.5V, RG = 6Ω, ID = -1A 2
Turn-On Rise Time tR 7.7 ns VDD = -6V, RL = 6Ω, VGS = -4.5V, RG = 6Ω, ID = -1A 2
Turn-Off Delay Time tD(OFF) 28.1 ns VDD = -6V, RL = 6Ω, VGS = -4.5V, RG = 6Ω, ID = -1A 2
Turn-Off Fall Time tF 14.6 ns VDD = -6V, RL = 6Ω, VGS = -4.5V, RG = 6Ω, ID = -1A 2
Body Diode Reverse Recovery Time tRR 9.8 ns IF = -8.9A, di/dt = -100A/μs 2
Body Diode Reverse Recovery Charge QRR 2.7 nC IF = -8.9A, di/dt = -100A/μs 2

Materials and finish

As the datasheet states them (page.json metadata.appearance; the 3D model's colours follow it).

Part Material Colour / plating Datasheet says Page
housing PC Body Diode Reverse Recovery Charge QRR, 2.7, nC IF = -8.9A, di/dt = -100A/μs Notes: 5. Device mounted on FR-4 PC board, with minimum recommended pad layout, single sided. 2
contacts Copper tin  Terminal Connections: See Diagram  Terminals: Finish - Matte Tin Annealed over Copper Leadframe; 1

CAD (KiCad official)

  • Symbol: DMP2040UVT-13
  • Footprint: Package_TO_SOT_SMD:TSOT-23-6
  • 3D model: TSOT-26 (KiCad packages3D, STEP)
  • 3D model files: dmp2040uvt-13-etched.step / dmp2040uvt-13-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); dmp2040uvt-13.step / dmp2040uvt-13.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Diodes Incorporated datasheet (7 pp, sha256 439fd6034438b412, retrieved 2026-10-26, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF