component
DMP2040USD-13
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Diodes Incorporated MOSFETs, SO-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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DMP2040USD-13
Diodes Incorporated · MOSFETs · SO-8
DMP2040USD-13 from Diodes Incorporated, in a SO-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | S1 | passive | Source of P-channel MOSFET 1; internal schematic shows it as the source of the first device, with VDSS rated at -20V. |
| 2 | G1 | input | Gate of P-channel MOSFET 1; VGSS limit is ±12V, with a threshold of -0.6V to -1.5V. |
| 3 | S2 | passive | Source of P-channel MOSFET 2; internal schematic shows it as the source of the second device, with VDSS rated at -20V. |
| 4 | G2 | input | Gate of P-channel MOSFET 2; VGSS limit is ±12V, with a threshold of -0.6V to -1.5V. |
| 5 | D2 | passive | Drain of P-channel MOSFET 2; continuous drain current is -6.5A at TA=+25°C (VGS=-4.5V), pulsed IDM is -30A. |
| 6 | D2 | passive | Drain of P-channel MOSFET 2 (second drain pin, tied internally to pin 5); continuous drain current is -6.5A at TA=+25°C (VGS=-4.5V). |
| 7 | D1 | passive | Drain of P-channel MOSFET 1; continuous drain current is -6.5A at TA=+25°C (VGS=-4.5V), pulsed IDM is -30A. |
| 8 | D1 | passive | Drain of P-channel MOSFET 1 (second drain pin, tied internally to pin 7); continuous drain current is -6.5A at TA=+25°C (VGS=-4.5V). |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Diodes Incorporated |
| Package | SO-8 |
| Category | Transistors/Thyristors |
| Pins | 8 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Drain-Source Breakdown Voltage | BVDSS | -20 | V | VGS = 0V, ID = -250µA | 2 | ||
| Zero Gate Voltage Drain Current | IDSS | -1 | µA | VDS = -16V, VGS = 0V | 2 | ||
| Gate-Source Leakage | IGSS | 100 | nA | VGS = ±12V, VDS = 0V | 2 | ||
| Gate Threshold Voltage | VGS(TH) | -0.6 | -1.5 | V | VDS = VGS, ID = -250µA | 2 | |
| Static Drain-Source On-Resistance | RDS(ON) | 26 | 33 | mΩ | VGS = -4.5V, ID = -8.9A | 2 | |
| Static Drain-Source On-Resistance | RDS(ON) | 37.5 | 52 | mΩ | VGS = -2.5V, ID = -6.9A | 2 | |
| Diode Forward Voltage | VSD | -7 | -1.2 | V | VGS = 0V, IS = -2.9A | 2 | |
| Drain-Source Voltage | VDSS | -20 | V | TA = +25°C | 2 | ||
| Gate-Source Voltage | VGSS | -12 | 12 | V | TA = +25°C | 2 | |
| Continuous Drain Current (Note 6) | ID | -6.5 | A | VGS = -4.5V, Steady State, TA = +25°C | 2 | ||
| Continuous Drain Current (Note 6) | ID | -5 | A | VGS = -4.5V, Steady State, TA = +70°C | 2 | ||
| Continuous Drain Current (Note 7) | ID | -12 | A | VGS = -4.5V, Steady State, TC = +25°C | 2 | ||
| Continuous Drain Current (Note 7) | ID | -10 | A | VGS = -4.5V, Steady State, TC = +70°C | 2 | ||
| Pulsed Drain Current | IDM | -30 | A | 10μs Pulse, Duty Cycle = 1% | 2 | ||
| Continuous Source-Drain Diode Current (Note 6) | IS | -2.2 | A | 2 | |||
| Avalanche Current (Note 8) | IAS | -16 | A | L = 0.1mH | 2 | ||
| Avalanche Energy (Note 8) | EAS | 13.5 | mJ | L = 0.1mH | 2 | ||
| Total Power Dissipation (Note 5) | PD | 1.1 | W | TA = +25°C | 2 | ||
| Total Power Dissipation (Note 6) | PD | 1.6 | W | TA = +25°C | 2 | ||
| Operating and Storage Temperature Range | TJ, TSTG | -55 | 150 | °C | 2 | ||
| Thermal Resistance, Junction to Ambient (Note 5) | RθJA | 108 | °C/W | Steady State | 2 | ||
| Thermal Resistance, Junction to Ambient (Note 6) | RθJA | 76 | °C/W | Steady State | 2 | ||
| Thermal Resistance, Junction to Case (Note 7) | RθJC | 20 | °C/W | Steady State | 2 | ||
| Input Capacitance | Ciss | 834 | pF | VDS = -10V, VGS = 0V, f = 1.0MHz | 2 | ||
| Output Capacitance | Coss | 133 | pF | VDS = -10V, VGS = 0V, f = 1.0MHz | 2 | ||
| Reverse Transfer Capacitance | Crss | 105 | pF | VDS = -10V, VGS = 0V, f = 1.0MHz | 2 | ||
| Gate Resistance | Rg | 4.9 | Ω | VDS = 0V, VGS = 0V, f = 1.0MHz | 2 | ||
| Total Gate Charge (VGS = -4.5V) | Qg | 8.6 | nC | VDS = -6V, ID = -8.9A | 2 | ||
| Total Gate Charge (VGS = -8V) | Qg | 19 | nC | VDS = -6V, ID = -8.9A | 2 | ||
| Gate-Source Charge | Qgs | 1.5 | nC | VDS = -6V, ID = -8.9A | 2 | ||
| Gate-Drain Charge | Qgd | 2.5 | nC | VDS = -6V, ID = -8.9A | 2 | ||
| Turn-On Delay Time | tD(ON) | 5.8 | ns | VDD = -6V, RL = 6Ω, VGS = -4.5V, Rg = 6Ω, ID = -1A | 2 | ||
| Turn-On Rise Time | tR | 7.7 | ns | VDD = -6V, RL = 6Ω, VGS = -4.5V, Rg = 6Ω, ID = -1A | 2 | ||
| Turn-Off Delay Time | tD(OFF) | 28.1 | ns | VDD = -6V, RL = 6Ω, VGS = -4.5V, Rg = 6Ω, ID = -1A | 2 | ||
| Turn-Off Fall Time | tF | 14.6 | ns | VDD = -6V, RL = 6Ω, VGS = -4.5V, Rg = 6Ω, ID = -1A | 2 | ||
| Body Diode Reverse Recovery Time | tRR | 9.8 | ns | IF = -8.9A, di/dt = -100A/μs | 2 | ||
| Body Diode Reverse Recovery Charge | QRR | 2.7 | nC | IF = -8.9A, di/dt = -100A/μs | 2 |
Materials and finish
As the datasheet states them (page.json metadata.appearance; the 3D model's colours follow it).
| Part | Material | Colour / plating | Datasheet says | Page |
|---|---|---|---|---|
| housing | PC | Body Diode Reverse Recovery Charge QRR, 2.7, nC IF = -8.9A, di/dt = -100A/μs Notes: 5. Device mounted on FR-4 PC board, with minimum recommended pad layout, single sided. | 2 | |
| contacts | Copper | tin | Terminals Connections Indicator: See Diagram Terminals: Finish - Matte Tin Annealed over Copper Lead | 1 |
CAD (KiCad official)
- Symbol:
DMP2040USD-13 - Footprint:
Package_SO:SOIC-8_3.9x4.9mm_P1.27mm - 3D model: SO-8 (KiCad packages3D, STEP)
- 3D model files:
dmp2040usd-13-etched.step/dmp2040usd-13-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);dmp2040usd-13.step/dmp2040usd-13.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Diodes Incorporated datasheet (7 pp, sha256
fde581d9daadb008, retrieved 2026-10-22, tier: manufacturer) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-sonnet-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# DMP2040USD-13
**Diodes Incorporated** · MOSFETs · SO-8
DMP2040USD-13 from Diodes Incorporated, in a SO-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | S1 | passive | Source of P-channel MOSFET 1; internal schematic shows it as the source of the first device, with VDSS rated at -20V. |
| 2 | G1 | input | Gate of P-channel MOSFET 1; VGSS limit is ±12V, with a threshold of -0.6V to -1.5V. |
| 3 | S2 | passive | Source of P-channel MOSFET 2; internal schematic shows it as the source of the second device, with VDSS rated at -20V. |
| 4 | G2 | input | Gate of P-channel MOSFET 2; VGSS limit is ±12V, with a threshold of -0.6V to -1.5V. |
| 5 | D2 | passive | Drain of P-channel MOSFET 2; continuous drain current is -6.5A at TA=+25°C (VGS=-4.5V), pulsed IDM is -30A. |
| 6 | D2 | passive | Drain of P-channel MOSFET 2 (second drain pin, tied internally to pin 5); continuous drain current is -6.5A at TA=+25°C (VGS=-4.5V). |
| 7 | D1 | passive | Drain of P-channel MOSFET 1; continuous drain current is -6.5A at TA=+25°C (VGS=-4.5V), pulsed IDM is -30A. |
| 8 | D1 | passive | Drain of P-channel MOSFET 1 (second drain pin, tied internally to pin 7); continuous drain current is -6.5A at TA=+25°C (VGS=-4.5V). |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Diodes Incorporated |
| Package | SO-8 |
| Category | Transistors/Thyristors |
| Pins | 8 |
## Electrical characteristics
Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Drain-Source Breakdown Voltage | BVDSS | -20 | | | V | VGS = 0V, ID = -250µA | 2 |
| Zero Gate Voltage Drain Current | IDSS | | | -1 | µA | VDS = -16V, VGS = 0V | 2 |
| Gate-Source Leakage | IGSS | | | 100 | nA | VGS = ±12V, VDS = 0V | 2 |
| Gate Threshold Voltage | VGS(TH) | -0.6 | | -1.5 | V | VDS = VGS, ID = -250µA | 2 |
| Static Drain-Source On-Resistance | RDS(ON) | | 26 | 33 | mΩ | VGS = -4.5V, ID = -8.9A | 2 |
| Static Drain-Source On-Resistance | RDS(ON) | | 37.5 | 52 | mΩ | VGS = -2.5V, ID = -6.9A | 2 |
| Diode Forward Voltage | VSD | | -7 | -1.2 | V | VGS = 0V, IS = -2.9A | 2 |
| Drain-Source Voltage | VDSS | | | -20 | V | TA = +25°C | 2 |
| Gate-Source Voltage | VGSS | -12 | | 12 | V | TA = +25°C | 2 |
| Continuous Drain Current (Note 6) | ID | | | -6.5 | A | VGS = -4.5V, Steady State, TA = +25°C | 2 |
| Continuous Drain Current (Note 6) | ID | | | -5 | A | VGS = -4.5V, Steady State, TA = +70°C | 2 |
| Continuous Drain Current (Note 7) | ID | | | -12 | A | VGS = -4.5V, Steady State, TC = +25°C | 2 |
| Continuous Drain Current (Note 7) | ID | | | -10 | A | VGS = -4.5V, Steady State, TC = +70°C | 2 |
| Pulsed Drain Current | IDM | | | -30 | A | 10μs Pulse, Duty Cycle = 1% | 2 |
| Continuous Source-Drain Diode Current (Note 6) | IS | | | -2.2 | A | | 2 |
| Avalanche Current (Note 8) | IAS | | | -16 | A | L = 0.1mH | 2 |
| Avalanche Energy (Note 8) | EAS | | | 13.5 | mJ | L = 0.1mH | 2 |
| Total Power Dissipation (Note 5) | PD | | | 1.1 | W | TA = +25°C | 2 |
| Total Power Dissipation (Note 6) | PD | | | 1.6 | W | TA = +25°C | 2 |
| Operating and Storage Temperature Range | TJ, TSTG | -55 | | 150 | °C | | 2 |
| Thermal Resistance, Junction to Ambient (Note 5) | RθJA | | 108 | | °C/W | Steady State | 2 |
| Thermal Resistance, Junction to Ambient (Note 6) | RθJA | | 76 | | °C/W | Steady State | 2 |
| Thermal Resistance, Junction to Case (Note 7) | RθJC | | 20 | | °C/W | Steady State | 2 |
| Input Capacitance | Ciss | | 834 | | pF | VDS = -10V, VGS = 0V, f = 1.0MHz | 2 |
| Output Capacitance | Coss | | 133 | | pF | VDS = -10V, VGS = 0V, f = 1.0MHz | 2 |
| Reverse Transfer Capacitance | Crss | | 105 | | pF | VDS = -10V, VGS = 0V, f = 1.0MHz | 2 |
| Gate Resistance | Rg | | 4.9 | | Ω | VDS = 0V, VGS = 0V, f = 1.0MHz | 2 |
| Total Gate Charge (VGS = -4.5V) | Qg | | 8.6 | | nC | VDS = -6V, ID = -8.9A | 2 |
| Total Gate Charge (VGS = -8V) | Qg | | 19 | | nC | VDS = -6V, ID = -8.9A | 2 |
| Gate-Source Charge | Qgs | | 1.5 | | nC | VDS = -6V, ID = -8.9A | 2 |
| Gate-Drain Charge | Qgd | | 2.5 | | nC | VDS = -6V, ID = -8.9A | 2 |
| Turn-On Delay Time | tD(ON) | | 5.8 | | ns | VDD = -6V, RL = 6Ω, VGS = -4.5V, Rg = 6Ω, ID = -1A | 2 |
| Turn-On Rise Time | tR | | 7.7 | | ns | VDD = -6V, RL = 6Ω, VGS = -4.5V, Rg = 6Ω, ID = -1A | 2 |
| Turn-Off Delay Time | tD(OFF) | | 28.1 | | ns | VDD = -6V, RL = 6Ω, VGS = -4.5V, Rg = 6Ω, ID = -1A | 2 |
| Turn-Off Fall Time | tF | | 14.6 | | ns | VDD = -6V, RL = 6Ω, VGS = -4.5V, Rg = 6Ω, ID = -1A | 2 |
| Body Diode Reverse Recovery Time | tRR | | 9.8 | | ns | IF = -8.9A, di/dt = -100A/μs | 2 |
| Body Diode Reverse Recovery Charge | QRR | | 2.7 | | nC | IF = -8.9A, di/dt = -100A/μs | 2 |
## Materials and finish
As the datasheet states them (page.json `metadata.appearance`; the 3D model's colours follow it).
| Part | Material | Colour / plating | Datasheet says | Page |
|---|---|---|---|---|
| housing | PC | | Body Diode Reverse Recovery Charge QRR, 2.7, nC IF = -8.9A, di/dt = -100A/μs Notes: 5. Device mounted on FR-4 PC board, with minimum recommended pad layout, single sided. | 2 |
| contacts | Copper | tin | Terminals Connections Indicator: See Diagram Terminals: Finish - Matte Tin Annealed over Copper Lead | 1 |
## CAD (KiCad official)
- Symbol: `DMP2040USD-13`
- Footprint: `Package_SO:SOIC-8_3.9x4.9mm_P1.27mm`
- 3D model: SO-8 (KiCad packages3D, STEP)
- 3D model files: `dmp2040usd-13-etched.step` / `dmp2040usd-13-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `dmp2040usd-13.step` / `dmp2040usd-13.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [Diodes Incorporated datasheet](https://www.diodes.com/assets/Datasheets/DMP2040USD-13.pdf) (7 pp, sha256 `fde581d9daadb008`, retrieved 2026-10-22, tier: manufacturer)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-sonnet-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/dmp2040usd-13-datasheet.pdf)