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DMP2022LSSQ-13
Public Made by Adomby adom
Diodes Incorporated MOSFETs, SO-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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Contents
README
markdownDMP2022LSSQ-13
Diodes Incorporated · MOSFETs · SO-8
DMP2022LSSQ-13 from Diodes Incorporated, in a SO-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | S | passive | Source terminal of the P-channel MOSFET, with drain-source voltage rating of -20V. |
| 2 | S | passive | Source terminal of the P-channel MOSFET, tied in parallel with the other source pins for current sharing. |
| 3 | S | passive | Source terminal of the P-channel MOSFET, tied in parallel with the other source pins for current sharing. |
| 4 | G | input | Gate terminal with a gate-source voltage limit of ±12V and threshold of -0.6V to -1.1V. |
| 5 | D | passive | Drain terminal of the P-channel MOSFET, rated for -9.3A continuous at TA = +25°C. |
| 6 | D | passive | Drain terminal of the P-channel MOSFET, tied in parallel with the other drain pins; pulsed drain current up to -35A. |
| 7 | D | passive | Drain terminal of the P-channel MOSFET, tied in parallel with the other drain pins. |
| 8 | D | passive | Drain terminal of the P-channel MOSFET, tied in parallel with the other drain pins. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Diodes Incorporated |
| Package | SO-8 |
| Category | Transistors/Thyristors |
| Pins | 8 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Drain-Source Breakdown Voltage | BVDSS | -20 | V | VGS = 0V, ID = -250µA | 2 | ||
| Zero Gate Voltage Drain Current | IDSS | -1 | µA | VDS = -20V, VGS = 0V | 2 | ||
| Gate-Source Leakage | IGSS | 100 | nA | VGS = 12V, VDS = 0V | 2 | ||
| Gate Threshold Voltage | VGS(TH) | -0.6 | -0.77 | -1.1 | V | VDS = VGS, ID = -250µA | 2 |
| Static Drain-Source On-Resistance | RDS(ON) | 8 | 13 | mΩ | VGS = -10V, ID = -10A | 2 | |
| Static Drain-Source On-Resistance | RDS(ON) | 11 | 16 | mΩ | VGS = -4.5V, ID = -9A | 2 | |
| Static Drain-Source On-Resistance | RDS(ON) | 17 | 22 | mΩ | VGS = -2.5V, ID = -8A | 2 | |
| Diode Forward Voltage | VSD | -0.5 | -0.68 | -1.2 | V | VGS = 0V, IS = -3A | 2 |
| Turn-On Delay Time | tD(ON) | 4.5 | 15 | ns | VDD = -15V, ID = -1A, VGS = -10V, RGEN = 6Ω | 2 | |
| Turn-On Rise Time | tR | 3.3 | 20 | ns | VDD = -15V, ID = -1A, VGS = -10V, RGEN = 6Ω | 2 | |
| Turn-Off Delay Time | tD(OFF) | 197 | 216 | ns | VDD = -15V, ID = -1A, VGS = -10V, RGEN = 6Ω | 2 | |
| Turn-Off Fall Time | tF | 60.5 | 153 | ns | VDD = -15V, ID = -1A, VGS = -10V, RGEN = 6Ω | 2 | |
| Drain-Source Voltage | VDSS | -20 | V | TA = +25°C | 2 | ||
| Gate-Source Voltage | VGSS | -12 | 12 | V | TA = +25°C | 2 | |
| Drain Current, Steady State | ID | -9.3 | A | TA = +25°C, Note 6 | 2 | ||
| Drain Current, Steady State | ID | -7.4 | A | TA = +70°C, Note 6 | 2 | ||
| Pulsed Drain Current | IDM | -35 | A | Pulse width 10µS, Duty Cycle 1% | 2 | ||
| Avalanche Current | IAS | -18 | A | L = 0.3mH | 2 | ||
| Avalanche Energy | EAS | 48.6 | mJ | L = 0.3mH | 2 | ||
| Total Power Dissipation | PD | 1.6 | W | Note 6 | 2 | ||
| Thermal Resistance, Junction to Ambient | RθJA | 74 | °C/W | 2 | |||
| Operating and Storage Temperature Range | TJ, TSTG | -55 | 150 | °C | 2 | ||
| Forward Transconductance | gfs | 28 | S | VDS = -10V, ID = -10A | 2 | ||
| Input Capacitance | Ciss | 2575 | pF | VDS = -10V, VGS = 0V, f = 1MHz | 2 | ||
| Output Capacitance | Coss | 326 | pF | VDS = -10V, VGS = 0V, f = 1MHz | 2 | ||
| Reverse Transfer Capacitance | Crss | 261 | pF | VDS = -10V, VGS = 0V, f = 1MHz | 2 | ||
| Gate Resistance | RG | 10.9 | Ω | VGS = 0V, VDS = 0V, f = 1MHz | 2 | ||
| Total Gate Charge | Qg | 28.1 | nC | VDS = -10V, VGS = -4.5V, ID = -10A | 2 | ||
| Total Gate Charge | Qg | 60.2 | nC | VDS = -10V, VGS = -10V, ID = -10A | 2 | ||
| Gate-Source Charge | Qgs | 5.9 | nC | VDS = -10V, VGS = -10V, ID = -10A | 2 | ||
| Gate-Drain Charge | Qgd | 7.4 | nC | VDS = -10V, VGS = -10V, ID = -10A | 2 |
Materials and finish
As the datasheet states them (page.json metadata.appearance; the 3D model's colours follow it).
| Part | Material | Colour / plating | Datasheet says | Page |
|---|---|---|---|---|
| contacts | Copper | tin | Terminals Connections: See Diagram Terminals: Finish - Matte Tin Annealed over Copper Lead | 1 |
CAD (KiCad official)
- Symbol:
DMP2022LSSQ-13 - Footprint:
Package_SO:SOIC-8_3.9x4.9mm_P1.27mm - 3D model: SO-8 (KiCad packages3D, STEP)
- 3D model files:
dmp2022lssq-13-etched.step/dmp2022lssq-13-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);dmp2022lssq-13.step/dmp2022lssq-13.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Diodes Incorporated datasheet (7 pp, sha256
07fdec405ccc4829, retrieved 2026-10-22, tier: manufacturer) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-sonnet-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).