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DMP2022LSS-13

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Diodes Incorporated MOSFETs, SO-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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docs Publish 0.1.0 · Ray 29d ago
viewers dmp2022lss-13: viewers · Ray 29d ago
dmp2022lss-13-etched.glb dmp2022lss-13: factory component page (tier=lcsc) · Ray 29d ago
dmp2022lss-13-etched.step dmp2022lss-13: factory component page (tier=lcsc) · Ray 29d ago
dmp2022lss-13-hero.glb dmp2022lss-13: hero GLB from the etched model (keeps the MPN mark) · Ray 29d ago
dmp2022lss-13-hero.overlay.json Publish 0.1.0 · Ray 29d ago
dmp2022lss-13.glb Publish 0.1.0 · Ray 29d ago
dmp2022lss-13.kicad_mod Publish 0.1.0 · Ray 29d ago
dmp2022lss-13.kicad_sym Publish 0.1.0 · Ray 29d ago
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dmp2022lss-13.step Publish 0.1.0 · Ray 29d ago
package.json Publish 0.1.0 · Ray 29d ago
page.json dmp2022lss-13: specified limits as data (metadata.characteristics, 20 rows from the datasheet) · Ray 23d ago
README.md dmp2022lss-13: specified limits as data (metadata.characteristics, 20 rows from the datasheet) · Ray 23d ago

DMP2022LSS-13

Diodes Incorporated · MOSFETs · SO-8

DMP2022LSS-13 from Diodes Incorporated, in a SO-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 S passive Source of the P-channel MOSFET, tied internally to pins 2 and 3; drain-source voltage rated -20V.
2 S passive Source of the P-channel MOSFET, tied internally to pins 1 and 3; continuous drain current is -10A at TA=+25°C.
3 S passive Source of the P-channel MOSFET, tied internally to pins 1 and 2; pulsed drain current is -90A.
4 G input Gate of the P-channel MOSFET with gate-source voltage rating of ±12V and threshold of -0.6V to -1.1V at ID=-250µA.
5 D passive Drain of the P-channel MOSFET, tied internally to pins 6, 7 and 8; RDS(ON) is 13mΩ max at VGS=-10V.
6 D passive Drain of the P-channel MOSFET, tied internally to pins 5, 7 and 8; drain-source breakdown is -20V min.
7 D passive Drain of the P-channel MOSFET, tied internally to pins 5, 6 and 8; zero-gate-voltage drain current is -1µA max at VDS=-20V.
8 D passive Drain of the P-channel MOSFET, tied internally to pins 5, 6 and 7; power dissipation is 2.5W total.

Key specifications

Parameter Value
Manufacturer Diodes Incorporated
Package SO-8
Category Transistors/Thyristors
Pins 8

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Drain-Source Breakdown Voltage BVDSS -20 V VGS = 0V, ID = -250A 2
Zero Gate Voltage Drain Current IDSS -1 A VDS = -20V, VGS = 0V 2
Gate-Source Leakage IGSS 100 nA VGS = 12V, VDS = 0V 2
Gate Threshold Voltage VGS(TH) -0.6 -0.77 -1.1 V VDS = VGS, ID = -250A 2
Static Drain-Source On-Resistance RDS(ON) 8 13 mΩ VGS = -10V, ID = -10A 2
Static Drain-Source On-Resistance RDS(ON) 11 16 mΩ VGS = -4.5V, ID = -9A 2
Static Drain-Source On-Resistance RDS(ON) 17 22 mΩ VGS = -2.5V, ID = -8A 2
Diode Forward Voltage VSD -0.5 -0.68 -1.2 V VGS = 0V, IS = -3A 2
Turn-On Delay Time tD(ON) 7.5 15 ns VDD = -15V, ID = -1A, VGS = -10V, RGEN = 6Ω 2
Turn-On Rise Time tR 9.9 20 ns VDD = -15V, ID = -1A, VGS = -10V, RGEN = 6Ω 2
Turn-Off Delay Time tD(OFF) 108 216 ns VDD = -15V, ID = -1A, VGS = -10V, RGEN = 6Ω 2
Turn-Off Fall Time tF 76.5 153 ns VDD = -15V, ID = -1A, VGS = -10V, RGEN = 6Ω 2
Drain-Source Voltage VDSS -20 V 2
Gate-Source Voltage VGSS 12 V 2
Drain Current (Steady State) ID -10 A Steady State, TA = +25°C 2
Drain Current (Steady State) ID -8 A Steady State, TA = +70°C 2
Pulsed Drain Current IDM -90 A Pulse width 10S, Duty Cycle 1% 2
Total Power Dissipation PD 2.5 W 2
Thermal Resistance, Junction to Ambient RJA 50 °C/W 2
Operating and Storage Temperature Range TJ, TSTG -55 150 °C 2

CAD (KiCad official)

  • Symbol: DMP2022LSS-13
  • Footprint: Package_SO:SOIC-8_3.9x4.9mm_P1.27mm
  • 3D model: SO-8 (KiCad packages3D, STEP)
  • 3D model files: dmp2022lss-13-etched.step / dmp2022lss-13-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); dmp2022lss-13.step / dmp2022lss-13.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Diodes Incorporated datasheet (6 pp, sha256 94a2a4a80a597bc5, retrieved 2026-10-09, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (text+vision), consensus claude-opus-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF