component
DMP2004VK-7
Public Made by Adomby adom
Diodes Incorporated MOSFETs, SOT-563. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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DMP2004VK-7
Diodes Incorporated · MOSFETs · SOT-563
DMP2004VK-7 from Diodes Incorporated, in a SOT-563. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | S1 | passive | Source of P-channel MOSFET Q1 (drain-source rated -20V). |
| 2 | G1 | input | Gate of Q1, ESD protected by an internal gate protection diode, with VGSS rating of ±8V and VGS(th) of -0.5 to -1.0V. |
| 3 | D2 | passive | Drain of P-channel MOSFET Q2 (-20V VDSS, ID up to -0.53A at VGS = -4.5V). |
| 4 | S2 | passive | Source of P-channel MOSFET Q2 (drain-source rated -20V). |
| 5 | G2 | input | Gate of Q2, ESD protected by an internal gate protection diode, with VGSS rating of ±8V and VGS(th) of -0.5 to -1.0V. |
| 6 | D1 | passive | Drain of P-channel MOSFET Q1 (-20V VDSS, ID up to -0.53A at VGS = -4.5V). |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Diodes Incorporated |
| Package | SOT-563 |
| Category | Transistors/Thyristors |
| Pins | 6 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Drain-Source Voltage | VDSS | -20 | V | 2 | |||
| Gate-Source Voltage | VGSS | -8 | 8 | V | 2 | ||
| Continuous Drain Current | ID | -0.53 | A | VGS = -4.5V, steady state, TA = +25C | 2 | ||
| Continuous Drain Current | ID | -0.44 | A | VGS = -4.5V, steady state, TA = +70C | 2 | ||
| Continuous Drain Current | ID | -0.35 | A | VGS = -2.5V, steady state, TA = +70C | 2 | ||
| Pulsed Drain Current | IDM | -1.8 | A | Note 6: minimum recommended pad layout test board, 10µs pulse, duty cycle = 1% | 2 | ||
| Total Power Dissipation | PD | 400 | mW | Note 5: device mounted on FR-4 PCB, with minimum recommended pad layout | 2 | ||
| Thermal Resistance, Junction to Ambient | RθJA | 312 | °C/W | Note 5: device mounted on FR-4 PCB, with minimum recommended pad layout | 2 | ||
| Operating and Storage Temperature Range | TJ, TSTG | -65 | 150 | °C | 2 | ||
| Drain-Source Breakdown Voltage | BVDSS | -20 | V | VGS = 0V, ID = -250µA | 2 | ||
| Zero Gate Voltage Drain Current | IDSS | -1 | µA | VDS = -20V, VGS = 0V | 2 | ||
| Gate-Source Leakage | IGSS | 1 | µA | VGS = 4.5V, VDS = 0V | 2 | ||
| Gate Threshold Voltage | VGS(th) | -0.5 | -1 | V | VDS = VGS, ID = -250µA | 2 | |
| Static Drain-Source On-Resistance | RDS(ON) | 0.7 | 0.9 | Ω | VGS = -4.5V, ID = -430mA | 2 | |
| Static Drain-Source On-Resistance | RDS(ON) | 1.1 | 1.4 | Ω | VGS = -2.5V, ID = -300mA | 2 | |
| Static Drain-Source On-Resistance | RDS(ON) | 1.7 | 2 | Ω | VGS = -1.8V, ID = -150mA | 2 | |
| Diode Forward Voltage | VSD | -0.5 | -1.2 | V | VGS = 0V, IS = 115mA | 2 |
Materials and finish
As the datasheet states them (page.json metadata.appearance; the 3D model's colours follow it).
| Part | Material | Colour / plating | Datasheet says | Page |
|---|---|---|---|---|
| contacts | Copper | tin | Terminal Connections: See Diagram Terminals: Finish, Matte Tin Annealed over Copper Leadframe. | 1 |
CAD (KiCad official)
- Symbol:
DMP2004VK-7 - Footprint:
Package_TO_SOT_SMD:SOT-563 - 3D model: SOT-563 (KiCad packages3D, STEP)
- 3D model files:
dmp2004vk-7-etched.step/dmp2004vk-7-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);dmp2004vk-7.step/dmp2004vk-7.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Diodes Incorporated datasheet (6 pp, sha256
aa5924cc4849574f, retrieved 2026-10-17, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-sonnet-5-5(text+vision), consensusclaude-opus-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# DMP2004VK-7
**Diodes Incorporated** · MOSFETs · SOT-563
DMP2004VK-7 from Diodes Incorporated, in a SOT-563. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | S1 | passive | Source of P-channel MOSFET Q1 (drain-source rated -20V). |
| 2 | G1 | input | Gate of Q1, ESD protected by an internal gate protection diode, with VGSS rating of ±8V and VGS(th) of -0.5 to -1.0V. |
| 3 | D2 | passive | Drain of P-channel MOSFET Q2 (-20V VDSS, ID up to -0.53A at VGS = -4.5V). |
| 4 | S2 | passive | Source of P-channel MOSFET Q2 (drain-source rated -20V). |
| 5 | G2 | input | Gate of Q2, ESD protected by an internal gate protection diode, with VGSS rating of ±8V and VGS(th) of -0.5 to -1.0V. |
| 6 | D1 | passive | Drain of P-channel MOSFET Q1 (-20V VDSS, ID up to -0.53A at VGS = -4.5V). |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Diodes Incorporated |
| Package | SOT-563 |
| Category | Transistors/Thyristors |
| Pins | 6 |
## Electrical characteristics
Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Drain-Source Voltage | VDSS | -20 | | | V | | 2 |
| Gate-Source Voltage | VGSS | -8 | | 8 | V | | 2 |
| Continuous Drain Current | ID | -0.53 | | | A | VGS = -4.5V, steady state, TA = +25C | 2 |
| Continuous Drain Current | ID | -0.44 | | | A | VGS = -4.5V, steady state, TA = +70C | 2 |
| Continuous Drain Current | ID | -0.35 | | | A | VGS = -2.5V, steady state, TA = +70C | 2 |
| Pulsed Drain Current | IDM | -1.8 | | | A | Note 6: minimum recommended pad layout test board, 10µs pulse, duty cycle = 1% | 2 |
| Total Power Dissipation | PD | | | 400 | mW | Note 5: device mounted on FR-4 PCB, with minimum recommended pad layout | 2 |
| Thermal Resistance, Junction to Ambient | RθJA | | | 312 | °C/W | Note 5: device mounted on FR-4 PCB, with minimum recommended pad layout | 2 |
| Operating and Storage Temperature Range | TJ, TSTG | -65 | | 150 | °C | | 2 |
| Drain-Source Breakdown Voltage | BVDSS | -20 | | | V | VGS = 0V, ID = -250µA | 2 |
| Zero Gate Voltage Drain Current | IDSS | | | -1 | µA | VDS = -20V, VGS = 0V | 2 |
| Gate-Source Leakage | IGSS | | | 1 | µA | VGS = 4.5V, VDS = 0V | 2 |
| Gate Threshold Voltage | VGS(th) | -0.5 | | -1 | V | VDS = VGS, ID = -250µA | 2 |
| Static Drain-Source On-Resistance | RDS(ON) | | 0.7 | 0.9 | Ω | VGS = -4.5V, ID = -430mA | 2 |
| Static Drain-Source On-Resistance | RDS(ON) | | 1.1 | 1.4 | Ω | VGS = -2.5V, ID = -300mA | 2 |
| Static Drain-Source On-Resistance | RDS(ON) | | 1.7 | 2 | Ω | VGS = -1.8V, ID = -150mA | 2 |
| Diode Forward Voltage | VSD | | -0.5 | -1.2 | V | VGS = 0V, IS = 115mA | 2 |
## Materials and finish
As the datasheet states them (page.json `metadata.appearance`; the 3D model's colours follow it).
| Part | Material | Colour / plating | Datasheet says | Page |
|---|---|---|---|---|
| contacts | Copper | tin | Terminal Connections: See Diagram Terminals: Finish, Matte Tin Annealed over Copper Leadframe. | 1 |
## CAD (KiCad official)
- Symbol: `DMP2004VK-7`
- Footprint: `Package_TO_SOT_SMD:SOT-563`
- 3D model: SOT-563 (KiCad packages3D, STEP)
- 3D model files: `dmp2004vk-7-etched.step` / `dmp2004vk-7-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `dmp2004vk-7.step` / `dmp2004vk-7.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [Diodes Incorporated datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8586203213339512832) (6 pp, sha256 `aa5924cc4849574f`, retrieved 2026-10-17, tier: lcsc)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-sonnet-5-5` (text+vision), consensus `claude-opus-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/dmp2004vk-7-datasheet.pdf)