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DMN67D8L-7

Public Made by Adom

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Diodes Incorporated MOSFETs, SOT-23. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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DMN67D8L-7

Diodes Incorporated · MOSFETs · SOT-23

DMN67D8L-7 from Diodes Incorporated, in a SOT-23. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 G input Gate; the top-view diagram shows it at the bottom-left terminal, with absolute maximum VGSS of ±30 V and a gate threshold VGS(TH) of 1.0 V min to 2.5 V max at ID = 250 µA.
2 S passive Source; the top-view diagram shows it at the bottom-right terminal, with a maximum body diode forward current IS of 230 mA.
3 D passive Drain; the top-view diagram shows it as the single terminal on the top side, with VDSS of 60 V and continuous ID of 230 mA at TA = +25°C (VGS = 10 V).

Key specifications

Parameter Value
Manufacturer Diodes Incorporated
Package SOT-23
Category Transistors/Thyristors
Pins 3

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Drain-Source Voltage VDSS 60 V 2
Gate-Source Voltage VGSS -30 30 V Printed as ±30 V 2
Continuous Drain Current ID 230 mA VGS = 10V, steady state, TA = +25°C (Note 6) 2
Continuous Drain Current ID 170 mA VGS = 10V, steady state, TA = +85°C (Note 6) 2
Maximum Body Diode Forward Current IS 230 mA Note 6 2
Pulsed Drain Current IDM 800 mA 10µs pulse, duty cycle = 1% 2
Total Power Dissipation PD 340 mW Note 5: FR-4 PCB, minimum recommended pad layout 2
Thermal Resistance, Junction to Ambient, Steady State RθJA 376 °C/W Note 5: FR-4 PCB, minimum recommended pad layout 2
Total Power Dissipation PD 570 mW Note 6: 1in x 1in FR-4 PCB, high coverage 2oz copper, single sided 2
Thermal Resistance, Junction to Ambient, Steady State RθJA 224 °C/W Note 6: 1in x 1in FR-4 PCB, high coverage 2oz copper, single sided 2
Operating and Storage Temperature Range TJ, TSTG -55 150 °C 2
Drain-Source Breakdown Voltage BVDSS 60 V VGS = 0V, ID = 10µA 2
Zero Gate Voltage Drain Current IDSS 1 µA VDS = 60V, VGS = 0V 2
Gate-Source Leakage IGSS -100 100 nA VGS = ±20V, VDS = 0V 2
Gate Threshold Voltage VGS(TH) 1 2.5 V VDS = VGS, ID = 250µA 2
Static Drain-Source On-Resistance RDS(ON) 1.4 7.5 Ω VGS = 5V, ID = 0.05A 2
Static Drain-Source On-Resistance RDS(ON) 1.3 5 Ω VGS = 10V, ID = 0.5A 2
Forward Transconductance gFS 80 mS VDS = 10V, ID = 0.2A 2
Diode Forward Voltage VSD 0.78 1.5 V VGS = 0V, IS = 115mA 2

Materials and finish

As the datasheet states them (page.json metadata.appearance; the 3D model's colours follow it).

Part Material Colour / plating Datasheet says Page
contacts tin  Terminals: Matte Tin Finish Annealed over Alloy 42 Leadframe. Solderable per MIL-STD-202, Method 208 1

CAD (KiCad official)

  • Symbol: DMN67D8L-7
  • Footprint: Package_TO_SOT_SMD:SOT-23
  • 3D model: SOT-23 (KiCad packages3D, STEP)
  • 3D model files: dmn67d8l-7-etched.step / dmn67d8l-7-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); dmn67d8l-7.step / dmn67d8l-7.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Diodes Incorporated datasheet (7 pp, sha256 576fa34efe381cd5, retrieved 2026-10-19, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (text+vision), consensus claude-opus-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF