component
DMN65D8LDW-7
Public Made by Adomby adom
Diodes Incorporated MOSFETs, SOT-363. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
Generated by kicad-footprint-generator · KiCad file format 20260206
DMN65D8LDW-7
Diodes Incorporated · MOSFETs · SOT-363
DMN65D8LDW-7 from Diodes Incorporated, in a SOT-363. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | S2 | passive | Source of MOSFET 2 (second N-channel device, VDSS 60V, ID up to 200mA). |
| 2 | G2 | input | Gate of MOSFET 2, ESD protected to 1kV HBM, VGSS ±20V maximum, threshold 1.0 to 2.0V. |
| 3 | D1 | passive | Drain of MOSFET 1, VDSS 60V maximum, continuous ID up to 200mA (Note 6). |
| 4 | S1 | passive | Source of MOSFET 1 (first N-channel device, VDSS 60V, ID up to 200mA). |
| 5 | G1 | input | Gate of MOSFET 1, ESD protected to 1kV HBM, VGSS ±20V maximum, threshold 1.0 to 2.0V. |
| 6 | D2 | passive | Drain of MOSFET 2, VDSS 60V maximum, continuous ID up to 200mA (Note 6). |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Diodes Incorporated |
| Package | SOT-363 |
| Category | Transistors |
| Pins | 6 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Drain-Source Voltage | VDSS | 60 | V | TA = +25°C | 2 | ||
| Gate-Source Voltage | VGSS | -20 | 20 | V | TA = +25°C | 2 | |
| Continuous Drain Current (Note 5), VGS=10V, TA=+25°C | ID | 180 | mA | Steady state, VGS = 10V, TA = +25°C | 2 | ||
| Continuous Drain Current (Note 5), VGS=10V, TA=+70°C | ID | 140 | mA | Steady state, VGS = 10V, TA = +70°C | 2 | ||
| Continuous Drain Current (Note 5), VGS=5V, TA=+25°C | ID | 150 | mA | Steady state, VGS = 5V, TA = +25°C | 2 | ||
| Continuous Drain Current (Note 5), VGS=5V, TA=+70°C | ID | 120 | mA | Steady state, VGS = 5V, TA = +70°C | 2 | ||
| Continuous Drain Current (Note 6), VGS=10V, TA=+25°C | ID | 200 | mA | Steady state, VGS = 10V, TA = +25°C | 2 | ||
| Continuous Drain Current (Note 6), VGS=10V, TA=+70°C | ID | 160 | mA | Steady state, VGS = 10V, TA = +70°C | 2 | ||
| Continuous Drain Current (Note 6), VGS=5V, TA=+25°C | ID | 170 | mA | Steady state, VGS = 5V, TA = +25°C | 2 | ||
| Continuous Drain Current (Note 6), VGS=5V, TA=+70°C | ID | 140 | mA | Steady state, VGS = 5V, TA = +70°C | 2 | ||
| Pulsed Drain Current | IDM | 800 | mA | 10µs pulse, duty cycle = 1% | 2 | ||
| Total Power Dissipation (Note 5) | PD | 300 | mW | Note 5 | 2 | ||
| Thermal Resistance, Junction to Ambient (Note 5) | RθJA | 435 | °C/W | Note 5 | 2 | ||
| Total Power Dissipation (Note 6) | PD | 400 | mW | Note 6 | 2 | ||
| Thermal Resistance, Junction to Ambient (Note 6) | RθJA | 330 | °C/W | Note 6 | 2 | ||
| Thermal Resistance, Junction to Case (Note 6) | RθJC | 139 | °C/W | Note 6 | 2 | ||
| Operating and Storage Temperature Range | TJ, TSTG | -55 | 150 | °C | 2 | ||
| Drain-Source Breakdown Voltage | BVDSS | 60 | V | VGS = 0V, ID = 250µA | 3 | ||
| Zero Gate Voltage Drain Current (TJ=+25°C) | IDSS | 1 | µA | VDS = 60V, VGS = 0V, TJ = +25°C | 3 | ||
| Zero Gate Voltage Drain Current (TJ=+125°C) | IDSS | 5 | µA | VDS = 60V, VGS = 0V, TJ = +125°C (Note 8) | 3 | ||
| Gate-Body Leakage | IGSS | -5 | 5 | µA | VGS = ±20V, VDS = 0V | 3 | |
| Gate Threshold Voltage | VGS(th) | 1 | 2 | V | VDS = VGS, ID = 250µA | 3 | |
| Static Drain-Source On-Resistance (VGS=5V) | RDS(ON) | 2.2 | 8 | Ω | VGS = 5V, ID = 0.115A | 3 | |
| Static Drain-Source On-Resistance (VGS=10V) | RDS(ON) | 2 | 6 | Ω | VGS = 10V, ID = 0.115A | 3 | |
| Forward Transconductance | gFS | 80 | mS | VDS = 10V, ID = 0.115A | 3 | ||
| Diode Forward Voltage | VSD | 0.8 | 1.2 | V | VGS = 0V, IS = 115mA | 3 |
Materials and finish
As the datasheet states them (page.json metadata.appearance; the 3D model's colours follow it).
| Part | Material | Colour / plating | Datasheet says | Page |
|---|---|---|---|---|
| contacts | tin | Terminals: Solderable per MIL-STD-202, Method 208 Lead Free Plating (Matte Tin Finish Annealed over Alloy 42 | 1 |
CAD (KiCad official)
- Symbol:
DMN65D8LDW-7 - Footprint:
Package_TO_SOT_SMD:SOT-363_SC-70-6 - 3D model: SOT-363 (KiCad packages3D, STEP)
- 3D model files:
dmn65d8ldw-7-etched.step/dmn65d8ldw-7-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);dmn65d8ldw-7.step/dmn65d8ldw-7.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Diodes Incorporated datasheet (7 pp, sha256
ce7ddb99e00a47ce, retrieved 2026-10-22, tier: manufacturer) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-sonnet-5-5(text+vision), consensusclaude-opus-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).