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DMN63D8LW-7

Diodes Incorporated · MOSFETs · SOT-323

DMN63D8LW-7 from Diodes Incorporated, in a SOT-323. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 G input Gate; ESD protected up to 1kV by an internal gate protection diode, with VGSS rated ±20 V and VGS(TH) of 0.8 V min to 1.5 V max.
2 S passive Source terminal of the N-channel MOSFET, shown at the bottom right of the top view.
3 D passive Drain; VDSS is 30 V and continuous drain current is 380 mA at TA=+25°C with VGS=10 V.

Key specifications

Parameter Value
Manufacturer Diodes Incorporated
Package SOT-323
Category Transistors/Thyristors
Pins 3

CAD (KiCad official)

  • Symbol: DMN63D8LW-7
  • Footprint: Package_TO_SOT_SMD:SOT-323_SC-70
  • 3D model: SOT-323 (KiCad packages3D, STEP)
  • 3D model files: dmn63d8lw-7-etched.step / dmn63d8lw-7-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); dmn63d8lw-7.step / dmn63d8lw-7.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Diodes Incorporated datasheet (6 pp, sha256 3f67c8a4c708a426, retrieved 2026-10-09, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (text+vision), consensus claude-opus-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF