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DMN63D8LDW-7
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Diodes Incorporated MOSFETs, SOT-363. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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DMN63D8LDW-7
Diodes Incorporated · MOSFETs · SOT-363
DMN63D8LDW-7 from Diodes Incorporated, in a SOT-363. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | S1 | passive | Source of Q1 N-channel MOSFET (30V BVDSS device). |
| 2 | G1 | input | Gate of Q1, ESD-protected by an internal gate protection diode; VGSS rated ±20V. |
| 3 | D2 | passive | Drain of Q2 N-channel MOSFET; VDSS 30V, continuous ID 220mA to 260mA at TA=+25°C depending on mounting. |
| 4 | S2 | passive | Source of Q2 N-channel MOSFET. |
| 5 | G2 | input | Gate of Q2, ESD-protected by an internal gate protection diode; VGSS rated ±20V. |
| 6 | D1 | passive | Drain of Q1 N-channel MOSFET; VDSS 30V, continuous ID 220mA to 260mA at TA=+25°C depending on mounting. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Diodes Incorporated |
| Package | SOT-363 |
| Category | Transistors/Thyristors |
| Pins | 6 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Drain-Source Voltage | VDSS | 30 | V | 2 | |||
| Gate-Source Voltage | VGSS | -20 | 20 | V | 2 | ||
| Continuous Drain Current (Note 5), TA = +25°C | ID | 220 | mA | VGS = 10V, steady state, Note 5 | 2 | ||
| Continuous Drain Current (Note 5), TA = +70°C | ID | 170 | mA | VGS = 10V, steady state, Note 5 | 2 | ||
| Continuous Drain Current (Note 6), TA = +25°C | ID | 260 | mA | VGS = 10V, steady state, Note 6 | 2 | ||
| Continuous Drain Current (Note 6), TA = +70°C | ID | 210 | mA | VGS = 10V, steady state, Note 6 | 2 | ||
| Pulsed Drain Current | IDM | 800 | mA | 10s pulse, duty cycle = 1% | 2 | ||
| Total Power Dissipation (Note 5) | PD | 300 | mW | Note 5 | 2 | ||
| Total Power Dissipation (Note 6) | PD | 400 | mW | Note 6 | 2 | ||
| Thermal Resistance, Junction to Ambient (Note 5) | RJA | 435 | °C/W | Note 5 | 2 | ||
| Thermal Resistance, Junction to Ambient (Note 6) | RJA | 330 | °C/W | Note 6 | 2 | ||
| Thermal Resistance, Junction to Case (Note 6) | RJC | 139 | °C/W | Note 6 | 2 | ||
| Operating and Storage Temperature Range | TJ, TSTG | -55 | 150 | °C | 2 | ||
| Drain-Source Breakdown Voltage | BVDSS | 30 | V | VGS = 0V, ID = 250A | 2 | ||
| Zero Gate Voltage Drain Current | IDSS | 1 | µA | VDS = 30V, VGS = 0V | 2 | ||
| Gate-Body Leakage | IGSS | -10 | 10 | A | VGS = ±20V, VDS = 0V | 2 | |
| Gate Threshold Voltage | VGS(TH) | 0.8 | 1.5 | V | VDS = VGS, ID = 250A | 2 | |
| Static Drain-Source On-Resistance | RDS(ON) | 2.8 | Ω | VGS = 10.0V, ID = 250mA | 2 | ||
| Static Drain-Source On-Resistance | RDS(ON) | 3.8 | Ω | VGS = 5V, ID = 250mA | 2 | ||
| Static Drain-Source On-Resistance | RDS(ON) | 4.2 | Ω | VGS = 4.5V, ID = 250mA | 2 | ||
| Static Drain-Source On-Resistance | RDS(ON) | 4.5 | Ω | VGS = 4.0V, ID = 250mA | 2 | ||
| Static Drain-Source On-Resistance | RDS(ON) | 13 | Ω | VGS = 2.5V, ID = 10mA | 2 | ||
| Forward Transconductance | gFS | 80 | mS | VDS = 10V, ID = 0.115A | 2 | ||
| Diode Forward Voltage | VSD | 0.8 | 1.2 | V | VGS = 0V, IS = 115mA | 2 |
Materials and finish
As the datasheet states them (page.json metadata.appearance; the 3D model's colours follow it).
| Part | Material | Colour / plating | Datasheet says | Page |
|---|---|---|---|---|
| contacts | tin | Terminals: Matte Tin Finish Annealed over Alloy 42 Leadframe (Lead Free Plating). Solderable per MIL-STD-202, Method 208 | 1 |
CAD (KiCad official)
- Symbol:
DMN63D8LDW-7 - Footprint:
Package_TO_SOT_SMD:SOT-363_SC-70-6 - 3D model: SOT-363 (KiCad packages3D, STEP)
- 3D model files:
dmn63d8ldw-7-etched.step/dmn63d8ldw-7-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);dmn63d8ldw-7.step/dmn63d8ldw-7.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Diodes Incorporated datasheet (6 pp, sha256
8eed3829a9db6108, retrieved 2026-10-18, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-sonnet-5-5(text+vision), consensusclaude-opus-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# DMN63D8LDW-7
**Diodes Incorporated** · MOSFETs · SOT-363
DMN63D8LDW-7 from Diodes Incorporated, in a SOT-363. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | S1 | passive | Source of Q1 N-channel MOSFET (30V BVDSS device). |
| 2 | G1 | input | Gate of Q1, ESD-protected by an internal gate protection diode; VGSS rated ±20V. |
| 3 | D2 | passive | Drain of Q2 N-channel MOSFET; VDSS 30V, continuous ID 220mA to 260mA at TA=+25°C depending on mounting. |
| 4 | S2 | passive | Source of Q2 N-channel MOSFET. |
| 5 | G2 | input | Gate of Q2, ESD-protected by an internal gate protection diode; VGSS rated ±20V. |
| 6 | D1 | passive | Drain of Q1 N-channel MOSFET; VDSS 30V, continuous ID 220mA to 260mA at TA=+25°C depending on mounting. |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Diodes Incorporated |
| Package | SOT-363 |
| Category | Transistors/Thyristors |
| Pins | 6 |
## Electrical characteristics
Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Drain-Source Voltage | VDSS | | | 30 | V | | 2 |
| Gate-Source Voltage | VGSS | -20 | | 20 | V | | 2 |
| Continuous Drain Current (Note 5), TA = +25°C | ID | | | 220 | mA | VGS = 10V, steady state, Note 5 | 2 |
| Continuous Drain Current (Note 5), TA = +70°C | ID | | | 170 | mA | VGS = 10V, steady state, Note 5 | 2 |
| Continuous Drain Current (Note 6), TA = +25°C | ID | | | 260 | mA | VGS = 10V, steady state, Note 6 | 2 |
| Continuous Drain Current (Note 6), TA = +70°C | ID | | | 210 | mA | VGS = 10V, steady state, Note 6 | 2 |
| Pulsed Drain Current | IDM | | | 800 | mA | 10s pulse, duty cycle = 1% | 2 |
| Total Power Dissipation (Note 5) | PD | | | 300 | mW | Note 5 | 2 |
| Total Power Dissipation (Note 6) | PD | | | 400 | mW | Note 6 | 2 |
| Thermal Resistance, Junction to Ambient (Note 5) | RJA | | | 435 | °C/W | Note 5 | 2 |
| Thermal Resistance, Junction to Ambient (Note 6) | RJA | | | 330 | °C/W | Note 6 | 2 |
| Thermal Resistance, Junction to Case (Note 6) | RJC | | | 139 | °C/W | Note 6 | 2 |
| Operating and Storage Temperature Range | TJ, TSTG | -55 | | 150 | °C | | 2 |
| Drain-Source Breakdown Voltage | BVDSS | 30 | | | V | VGS = 0V, ID = 250A | 2 |
| Zero Gate Voltage Drain Current | IDSS | | | 1 | µA | VDS = 30V, VGS = 0V | 2 |
| Gate-Body Leakage | IGSS | -10 | | 10 | A | VGS = ±20V, VDS = 0V | 2 |
| Gate Threshold Voltage | VGS(TH) | 0.8 | | 1.5 | V | VDS = VGS, ID = 250A | 2 |
| Static Drain-Source On-Resistance | RDS(ON) | | | 2.8 | Ω | VGS = 10.0V, ID = 250mA | 2 |
| Static Drain-Source On-Resistance | RDS(ON) | | | 3.8 | Ω | VGS = 5V, ID = 250mA | 2 |
| Static Drain-Source On-Resistance | RDS(ON) | | | 4.2 | Ω | VGS = 4.5V, ID = 250mA | 2 |
| Static Drain-Source On-Resistance | RDS(ON) | | | 4.5 | Ω | VGS = 4.0V, ID = 250mA | 2 |
| Static Drain-Source On-Resistance | RDS(ON) | | | 13 | Ω | VGS = 2.5V, ID = 10mA | 2 |
| Forward Transconductance | gFS | 80 | | | mS | VDS = 10V, ID = 0.115A | 2 |
| Diode Forward Voltage | VSD | | 0.8 | 1.2 | V | VGS = 0V, IS = 115mA | 2 |
## Materials and finish
As the datasheet states them (page.json `metadata.appearance`; the 3D model's colours follow it).
| Part | Material | Colour / plating | Datasheet says | Page |
|---|---|---|---|---|
| contacts | | tin | Terminals: Matte Tin Finish Annealed over Alloy 42 Leadframe (Lead Free Plating). Solderable per MIL-STD-202, Method 208 | 1 |
## CAD (KiCad official)
- Symbol: `DMN63D8LDW-7`
- Footprint: `Package_TO_SOT_SMD:SOT-363_SC-70-6`
- 3D model: SOT-363 (KiCad packages3D, STEP)
- 3D model files: `dmn63d8ldw-7-etched.step` / `dmn63d8ldw-7-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `dmn63d8ldw-7.step` / `dmn63d8ldw-7.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [Diodes Incorporated datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8560085471171796992) (6 pp, sha256 `8eed3829a9db6108`, retrieved 2026-10-18, tier: lcsc)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-sonnet-5-5` (text+vision), consensus `claude-opus-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/dmn63d8ldw-7-datasheet.pdf)