component
DMN63D1LT-7
Public Made by Adomby adom
Diodes Incorporated MOSFETs, SOT-523. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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Contents
README
markdownDMN63D1LT-7
Diodes Incorporated · MOSFETs · SOT-523
DMN63D1LT-7 from Diodes Incorporated, in a SOT-523. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | G | input | Gate, ESD-protected through an internal gate protection diode, with VGSS rated ±20 V and threshold VGS(TH) of 1.0 V min to 2.5 V max at VDS = 10 V, ID = 1 mA. |
| 2 | S | passive | Source, connected to the body diode anode, with continuous body diode forward current IS of 0.5 A max. |
| 3 | D | passive | Drain, rated for VDSS of 60 V with continuous drain current ID of 320 mA at TA = +25°C and pulsed IDM of 1.2 A. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Diodes Incorporated |
| Package | SOT-523 |
| Category | Transistors/Thyristors |
| Pins | 3 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Drain-Source Voltage | VDSS | 60 | V | TA = +25°C | 2 | ||
| Gate-Source Voltage | VGSS | -20 | 20 | V | TA = +25°C | 2 | |
| Continuous Drain Current | ID | 320 | mA | Steady State, TA = +25°C, VGS = 10V (Note 6) | 2 | ||
| Continuous Drain Current | ID | 260 | mA | Steady State, TA = +70°C, VGS = 10V (Note 6) | 2 | ||
| Maximum Continuous Body Diode Forward Current | IS | 0.5 | A | Note 6 | 2 | ||
| Pulsed Drain Current | IDM | 1.2 | A | 10µs Pulse, Duty Cycle = 1% | 2 | ||
| Total Power Dissipation | PD | 260 | mW | Note 5 | 2 | ||
| Total Power Dissipation | PD | 330 | mW | Note 6 | 2 | ||
| Thermal Resistance, Junction to Ambient | RθJA | 497 | °C/W | Steady State, Note 5 | 2 | ||
| Thermal Resistance, Junction to Ambient | RθJA | 389 | °C/W | Steady State, Note 6 | 2 | ||
| Operating and Storage Temperature Range | TJ, TSTG | -55 | 150 | °C | 2 | ||
| Drain-Source Breakdown Voltage | BVDSS | 60 | V | VGS = 0V, ID = 10µA | 2 | ||
| Zero Gate Voltage Drain Current | IDSS | 1 | µA | VDS = 60V, VGS = 0V | 2 | ||
| Gate-Source Leakage | IGSS | -10 | 10 | µA | VGS = ±20V, VDS = 0V | 2 | |
| Gate Threshold Voltage | VGS(TH) | 1 | 1.6 | 2.5 | V | VDS = 10V, ID = 1mA | 2 |
| Static Drain-Source On-Resistance | RDS(ON) | 2 | Ω | VGS = 10V, ID = 0.5A | 2 | ||
| Static Drain-Source On-Resistance | RDS(ON) | 3 | Ω | VGS = 5V, ID = 0.05A | 2 | ||
| Forward Transfer Admittance | /Yfs/ | 80 | mS | VDS = 10V, ID = 0.2A | 2 | ||
| Diode Forward Voltage | VSD | 0.75 | 1.2 | V | VGS = 0V, IS = 115mA | 2 | |
| Input Capacitance | Ciss | 30 | pF | VDS = 25V, VGS = 0V, f = 1.0MHz | 2 | ||
| Output Capacitance | Coss | 4.2 | pF | VDS = 25V, VGS = 0V, f = 1.0MHz | 2 | ||
| Reverse Transfer Capacitance | Crss | 2.9 | pF | VDS = 25V, VGS = 0V, f = 1.0MHz | 2 | ||
| Gate Resistance | Rg | 133 | Ω | f = 1MHz, VGS = 0V, VDS = 0V | 2 | ||
| Total Gate Charge | Qg | 392 | pC | VGS = 4.5V, VDS = 10V, ID = 250mA | 2 | ||
| Gate-Source Charge | Qgs | 157 | pC | VGS = 4.5V, VDS = 10V, ID = 250mA | 2 | ||
| Gate-Drain Charge | Qgd | 92 | pC | VGS = 4.5V, VDS = 10V, ID = 250mA | 2 | ||
| Turn-On Delay Time | tD(ON) | 3.9 | ns | VDD = 30V, VGS = 10V, RG = 25Ω, ID = 200mA | 2 | ||
| Turn-On Rise Time | tR | 3.4 | ns | VDD = 30V, VGS = 10V, RG = 25Ω, ID = 200mA | 2 | ||
| Turn-Off Delay Time | tD(OFF) | 15.7 | ns | VDD = 30V, VGS = 10V, RG = 25Ω, ID = 200mA | 2 | ||
| Turn-Off Fall Time | tF | 9.9 | ns | VDD = 30V, VGS = 10V, RG = 25Ω, ID = 200mA | 2 |
Materials and finish
As the datasheet states them (page.json metadata.appearance; the 3D model's colours follow it).
| Part | Material | Colour / plating | Datasheet says | Page |
|---|---|---|---|---|
| contacts | tin | Terminals: Finish Matte Tin Annealed over Alloy 42 Leadframe. Solderable per MIL-STD-202, Method 208 | 1 |
CAD (KiCad official)
- Symbol:
DMN63D1LT-7 - Footprint:
Package_TO_SOT_SMD:SOT-523 - 3D model: SOT-523, generated from the KiCad footprint (body from the F.Fab outline, terminals on the pads, 0.8 mm nominal SOT-523 height). Neither the vendor nor KiCad ships a 3D model for this package, so the dimensions are nominal, not the manufacturer's CAD (STEP)
- 3D model files:
dmn63d1lt-7-etched.step/dmn63d1lt-7-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);dmn63d1lt-7.step/dmn63d1lt-7.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Diodes Incorporated datasheet (6 pp, sha256
313a12c0b9b5d4dd, retrieved 2026-10-22, tier: manufacturer) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-sonnet-5-5(text+vision), consensusclaude-opus-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).