component
DMN6140L-13
Public Made by Adomby adom
Diodes Incorporated MOSFETs, SOT-23. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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Contents
README
markdownDMN6140L-13
Diodes Incorporated · MOSFETs · SOT-23
DMN6140L-13 from Diodes Incorporated, in a SOT-23. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | G | input | Gate; gate-source voltage is rated at ±20V (VGSS), with a gate threshold of 1V min to 3V max at ID = 250µA. |
| 2 | S | passive | Source terminal of the N-channel MOSFET, with a maximum continuous body diode forward current of 1.5A. |
| 3 | D | passive | Drain terminal; drain-source voltage is rated at 60V with continuous drain current up to 2.3A (Note 6, steady state, TA = +25°C) and pulsed drain current of 10A. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Diodes Incorporated |
| Package | SOT-23 |
| Category | Transistors |
| Pins | 3 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Drain-Source Breakdown Voltage | BVDSS | 60 | V | VGS = 0V, ID = 250µA | 2 | ||
| Zero Gate Voltage Drain Current | IDSS | 1 | µA | VDS = 60V, VGS = 0V | 2 | ||
| Gate-Source Leakage | IGSS | -100 | 100 | nA | VGS = 20V, VDS = 0V | 2 | |
| Gate Threshold Voltage | VGS(th) | 1 | 3 | V | VDS = VGS, ID = 250µA | 2 | |
| Static Drain-Source On-Resistance (VGS=10V) | RDS(ON) | 92 | 140 | mΩ | VGS = 10V, ID = 1.8A | 2 | |
| Static Drain-Source On-Resistance (VGS=4.5V) | RDS(ON) | 115 | 170 | mΩ | VGS = 4.5V, ID = 1.3A | 2 | |
| Diode Forward Voltage | VSD | 0.75 | 1 | V | VGS = 0V, IS = 0.45A | 2 | |
| Drain-Source Voltage | VDSS | 60 | V | TA = +25°C | 2 | ||
| Gate-Source Voltage | VGSS | 20 | V | TA = +25°C | 2 | ||
| Continuous Drain Current (Note 5), steady state | ID | 1.6 | A | VGS = 10V, TA = +25°C, Steady State | 2 | ||
| Continuous Drain Current (Note 5), steady state | ID | 1.2 | A | VGS = 10V, TA = +70°C, Steady State | 2 | ||
| Continuous Drain Current (Note 5), t<10s | ID | 2 | A | VGS = 10V, TA = +25°C, t<10s | 2 | ||
| Continuous Drain Current (Note 5), t<10s | ID | 1.6 | A | VGS = 10V, TA = +70°C, t<10s | 2 | ||
| Continuous Drain Current (Note 6), steady state | ID | 2.3 | A | VGS = 10V, TA = +25°C, Steady State | 2 | ||
| Continuous Drain Current (Note 6), steady state | ID | 1.8 | A | VGS = 10V, TA = +70°C, Steady State | 2 | ||
| Continuous Drain Current (Note 6), t<10s | ID | 2.9 | A | VGS = 10V, TA = +25°C, t<10s | 2 | ||
| Continuous Drain Current (Note 6), t<10s | ID | 2.3 | A | VGS = 10V, TA = +70°C, t<10s | 2 | ||
| Maximum Continuous Body Diode Forward Current (Note 6) | IS | 1.5 | A | 2 | |||
| Pulsed Drain Current | IDM | 10 | A | 10μs pulse, duty cycle = 1% | 2 | ||
| Total Power Dissipation (Note 5) | PD | 0.7 | W | TA = +25°C | 2 | ||
| Total Power Dissipation (Note 5) | PD | 0.4 | W | TA = +70°C | 2 | ||
| Total Power Dissipation (Note 6) | PD | 1.3 | W | TA = +25°C | 2 | ||
| Total Power Dissipation (Note 6) | PD | 0.8 | W | TA = +70°C | 2 | ||
| Operating and Storage Temperature Range | TJ, TSTG | -55 | 150 | °C | 2 | ||
| Thermal Resistance, Junction to Ambient (Note 5), steady state | RθJA | 183 | °C/W | Steady State | 2 | ||
| Thermal Resistance, Junction to Ambient (Note 5), t<10s | RθJA | 115 | °C/W | t<10s | 2 | ||
| Thermal Resistance, Junction to Ambient (Note 6), steady state | RθJA | 94 | °C/W | Steady State | 2 | ||
| Thermal Resistance, Junction to Ambient (Note 6), t<10s | RθJA | 61 | °C/W | t<10s | 2 | ||
| Thermal Resistance, Junction to Case | RθJC | 39 | °C/W | 2 | |||
| Forward Transfer Admittance | /Yfs/ | 2.2 | S | VDS = 15V, ID = 1.8A | 2 | ||
| Input Capacitance | Ciss | 315 | pF | VDS = 40V, VGS = 0V, f = 1.0MHz | 2 | ||
| Output Capacitance | Coss | 18 | pF | VDS = 40V, VGS = 0V, f = 1.0MHz | 2 | ||
| Reverse Transfer Capacitance | Crss | 16 | pF | VDS = 40V, VGS = 0V, f = 1.0MHz | 2 | ||
| Gate Resistance | Rg | 0.65 | Ω | VDS = 0V, VGS = 0V, f = 1.0MHz | 2 | ||
| Total Gate Charge (VGS = 10V) | Qg | 8.6 | nC | VDS = 30V, ID = 1.8A | 2 | ||
| Total Gate Charge (VGS = 5V) | Qg | 4.1 | nC | VDS = 30V, ID = 1.8A | 2 | ||
| Gate-Source Charge | Qgs | 1 | nC | VDS = 30V, ID = 1.8A | 2 | ||
| Gate-Drain Charge | Qgd | 1.7 | nC | VDS = 30V, ID = 1.8A | 2 | ||
| Turn-On Delay Time | tD(on) | 2.6 | ns | VDS = 30V, VGS = 10V, RG = 6.0Ω, ID = 1.8A | 2 | ||
| Turn-On Rise Time | tr | 3.6 | ns | VDS = 30V, VGS = 10V, RG = 6.0Ω, ID = 1.8A | 2 | ||
| Turn-Off Delay Time | tD(off) | 16.3 | ns | VDS = 30V, VGS = 10V, RG = 6.0Ω, ID = 1.8A | 2 | ||
| Turn-Off Fall Time | tf | 2.7 | ns | VDS = 30V, VGS = 10V, RG = 6.0Ω, ID = 1.8A | 2 | ||
| Reverse Recovery Time | trr | 16.8 | ns | IF = 1.8A, di/dt = 100A/µs | 2 | ||
| Reverse Recovery Charge | Qrr | 9 | nC | IF = 1.8A, di/dt = 100A/µs | 2 |
Materials and finish
As the datasheet states them (page.json metadata.appearance; the 3D model's colours follow it).
| Part | Material | Colour / plating | Datasheet says | Page |
|---|---|---|---|---|
| contacts | Copper | tin | Terminal Connections: See Diagram Terminals: Finish, Matte Tin Annealed over Copper Leadframe. | 1 |
CAD (KiCad official)
- Symbol:
DMN6140L-13 - Footprint:
Package_TO_SOT_SMD:SOT-23 - 3D model: SOT-23 (KiCad packages3D, STEP)
- 3D model files:
dmn6140l-13-etched.step/dmn6140l-13-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);dmn6140l-13.step/dmn6140l-13.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Diodes Incorporated datasheet (6 pp, sha256
c2d2b52e30de5f8c, retrieved 2026-10-22, tier: manufacturer) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-sonnet-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).