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DMN53D0LT-7

Diodes Incorporated · MOSFETs · SOT-523

DMN53D0LT-7 from Diodes Incorporated, in a SOT-523. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 G input Gate; ESD protected to 2kV via an internal gate protection diode, with gate-source voltage limited to ±20V (VGSS) and threshold of 0.8V to 1.5V.
2 S passive Source terminal of the N-channel MOSFET, shown at the bottom right of the top view.
3 D passive Drain terminal of the N-channel MOSFET, rated for 50V VDSS and 350mA continuous drain current.

Key specifications

Parameter Value
Manufacturer Diodes Incorporated
Package SOT-523
Category Transistors/Thyristors
Pins 3

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Drain Source Voltage VDSS 50 V 2
Gate-Source Voltage VGSS 20 V 2
Drain Current ID 350 mA Note 5: FR-4 PCB, 2oz copper, 1 inch square copper plate 2
Total Power Dissipation PD 300 mW Note 5: FR-4 PCB, 2oz copper, 1 inch square copper plate 2
Thermal Resistance, Junction to Ambient RJA 420 C/W Note 5: FR-4 PCB, 2oz copper, 1 inch square copper plate 2
Operating and Storage Temperature Range TJ, TSTG -55 150 C 2
Drain-Source Breakdown Voltage BVDSS 50 V VGS = 0V, ID = 250A 2
Zero Gate Voltage Drain Current IDSS 1 µA VDS = 50V, VGS = 0V 2
Gate Threshold Voltage VGS(TH) 0.8 1.5 V VDS = VGS, ID = 250A 2
Static Drain-Source On-Resistance RDS(ON) 1.08 1.6 Ω VGS = 10V, ID = 500mA 2
Static Drain-Source On-Resistance RDS(ON) 1.09 2.5 Ω VGS = 4.5V, ID = 200mA 2
Static Drain-Source On-Resistance RDS(ON) 1.45 4.5 Ω VGS = 2.5V, ID = 100mA 2
Source-Drain Diode Forward Voltage VSD 0.88 1.4 V VGS = 0V, IS = 500mA 2

Materials and finish

As the datasheet states them (page.json metadata.appearance; the 3D model's colours follow it).

Part Material Colour / plating Datasheet says Page
contacts tin  Terminals: Matte Tin Finish Annealed over Alloy 42 Leadframe (Lead Free Plating). Solderable per MIL-STD-202, Method 208 1

CAD (KiCad official)

  • Symbol: DMN53D0LT-7
  • Footprint: Package_TO_SOT_SMD:SOT-523
  • 3D model: SOT-523, generated from the KiCad footprint (body from the F.Fab outline, terminals on the pads, 0.8 mm nominal SOT-523 height). Neither the vendor nor KiCad ships a 3D model for this package, so the dimensions are nominal, not the manufacturer's CAD (STEP)
  • 3D model files: dmn53d0lt-7-etched.step / dmn53d0lt-7-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); dmn53d0lt-7.step / dmn53d0lt-7.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Diodes Incorporated datasheet (6 pp, sha256 4610be06184b3151, retrieved 2026-10-17, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (text+vision), consensus claude-opus-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF