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DMN4800LSSQ-13

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Diodes Incorporated MOSFETs, SO-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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3D Model

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Symbol & Footprint

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Datasheet

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Contents

README

markdown

DMN4800LSSQ-13

Diodes Incorporated · MOSFETs · SO-8

DMN4800LSSQ-13 from Diodes Incorporated, in a SO-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 S passive Source of the N-channel MOSFET, pin 1 at the left-top of the top-view internal schematic.
2 S passive Source of the N-channel MOSFET.
3 S passive Source of the N-channel MOSFET.
4 G input Gate of the N-channel MOSFET, with a threshold VGS(th) of 0.8 to 1.6 V and a maximum VGSS of 25 V.
5 D passive Drain of the N-channel MOSFET, rated for VDSS of 30 V.
6 D passive Drain of the N-channel MOSFET, rated for VDSS of 30 V.
7 D passive Drain of the N-channel MOSFET, rated for VDSS of 30 V.
8 D passive Drain of the N-channel MOSFET, rated for VDSS of 30 V.

Key specifications

Parameter Value
Manufacturer Diodes Incorporated
Package SO-8
Category Transistors
Pins 8

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Drain-Source Breakdown Voltage BVDSS 30 V VGS = 0V, ID = 250μA 2
Zero Gate Voltage Drain Current IDSS 1 μA VDS = 30V, VGS = 0V 2
Gate-Source Leakage IGSS 100 nA VGS = 20V, VDS = 0V 2
Gate Threshold Voltage VGS(th) 0.8 1.2 1.6 V VDS = VGS, ID = 250μA 2
Static Drain-Source On-Resistance RDS(ON) 11 14 mΩ VGS = 10V, ID = 9A 2
Static Drain-Source On-Resistance RDS(ON) 14 20 mΩ VGS = 4.5V, ID = 7A 2
Diode Forward Voltage VSD 0.72 0.94 V VGS = 0V, IS = 1A 2
Drain-Source Voltage VDSS 30 V TA = +25°C 2
Gate-Source Voltage VGSS 25 V TA = +25°C 2
Continuous Drain Current, steady state ID 8.6 A VGS = 10V, TA = +25°C, Steady State (Note 7) 2
Continuous Drain Current, steady state ID 6.3 A VGS = 10V, TA = +70°C, Steady State (Note 7) 2
Continuous Drain Current, t<10s ID 11.8 A VGS = 10V, TA = +25°C, t<10s (Note 7) 2
Continuous Drain Current, t<10s ID 9 A VGS = 10V, TA = +70°C, t<10s (Note 7) 2
Maximum Body Diode Forward Current IS 2.4 A Note 7 2
Pulsed Drain Current IDM 50 A Note 8 2
Total Power Dissipation (Note 6) PD 1.46 W TA = +25°C 2
Total Power Dissipation (Note 6) PD 0.9 W TA = +70°C 2
Thermal Resistance, Junction to Ambient (Note 6) RθJA 86 °C/W Steady state 2
Thermal Resistance, Junction to Ambient (Note 6) RθJA 46 °C/W t<10s 2
Total Power Dissipation (Note 7) PD 1.7 W TA = +25°C 2
Total Power Dissipation (Note 7) PD 1 W TA = +70°C 2
Thermal Resistance, Junction to Ambient (Note 7) RθJA 75 °C/W Steady state 2
Thermal Resistance, Junction to Ambient (Note 7) RθJA 40 °C/W t<10s 2
Thermal Resistance, Junction to Case (Note 7) RθJC 15 °C/W 2
Operating and Storage Temperature Range TJ, TSTG -55 150 °C 2
Forward Transconductance gfs 8 S VDS = 10V, ID = 9A 2
Input Capacitance Ciss 798 pF VDS = 10V, VGS = 0V, f = 1.0MHz 2
Output Capacitance Coss 128 pF VDS = 10V, VGS = 0V, f = 1.0MHz 2
Reverse Transfer Capacitance Crss 122 pF VDS = 10V, VGS = 0V, f = 1.0MHz 2
Gate Resistance RG 1.37 Ω VDS = 0V, VGS = 0V, f = 1.0MHz 2
Total Gate Charge Qg 8.7 nC VGS = 5V, VDS = 15V, ID = 9A 2
Gate-Source Charge Qgs 1.7 nC VGS = 5V, VDS = 15V, ID = 9A 2
Gate-Drain Charge Qgd 2.4 nC VGS = 5V, VDS = 15V, ID = 9A 2
Turn-On Delay Time td(on) 5.03 ns VDD = 15V, VGEN = 10V, RL = 15Ω, RG = 6.0Ω, ID = 1A 2
Rise Time tr 4.5 ns VDD = 15V, VGEN = 10V, RL = 15Ω, RG = 6.0Ω, ID = 1A 2
Turn-Off Delay Time td(off) 26.33 ns VDD = 15V, VGEN = 10V, RL = 15Ω, RG = 6.0Ω, ID = 1A 2
Fall Time tf 8.55 ns VDD = 15V, VGEN = 10V, RL = 15Ω, RG = 6.0Ω, ID = 1A 2

Materials and finish

As the datasheet states them (page.json metadata.appearance; the 3D model's colours follow it).

Part Material Colour / plating Datasheet says Page
contacts Copper tin  Terminals Connections: See Diagram  Terminals: Finish - Matte Tin Annealed over Copper Leadframe. 1

CAD (KiCad official)

  • Symbol: DMN4800LSSQ-13
  • Footprint: Package_SO:SOIC-8_3.9x4.9mm_P1.27mm
  • 3D model: SO-8 (KiCad packages3D, STEP)
  • 3D model files: dmn4800lssq-13-etched.step / dmn4800lssq-13-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); dmn4800lssq-13.step / dmn4800lssq-13.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Diodes Incorporated datasheet (6 pp, sha256 b36d8f7295934ff6, retrieved 2026-10-22, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (text+vision), consensus claude-opus-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF