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DMN4027SSD-13

Diodes Incorporated · MOSFETs · SO-8

DMN4027SSD-13 from Diodes Incorporated, in a SO-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 S1 passive Source of N-channel MOSFET 1; the datasheet states no limit specific to this pin, and the drain-source rating is 40V.
2 G1 input Gate of N-channel MOSFET 1; gate threshold is 1.0V to 3.0V and the VGS maximum is 20V (16V for AEC-Q101).
3 S2 passive Source of N-channel MOSFET 2; the datasheet states no limit specific to this pin, and the drain-source rating is 40V.
4 G2 input Gate of N-channel MOSFET 2; gate threshold is 1.0V to 3.0V and the VGS maximum is 20V (16V for AEC-Q101).
5 D2 passive Drain of N-channel MOSFET 2, tied to pin 6; VDSS is 40V and continuous ID is 7.1A.
6 D2 passive Drain of N-channel MOSFET 2, tied to pin 5; VDSS is 40V and continuous ID is 7.1A.
7 D1 passive Drain of N-channel MOSFET 1, tied to pin 8; VDSS is 40V and continuous ID is 7.1A.
8 D1 passive Drain of N-channel MOSFET 1, tied to pin 7; VDSS is 40V and continuous ID is 7.1A.

Key specifications

Parameter Value
Manufacturer Diodes Incorporated
Package SO-8
Category Triode/MOS Tube/Transistor
Pins 8

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Drain-Source Voltage VDSS 40 V TA = +25°C 2
Gate-Source Voltage VGS 20 V Note 5: AEC-Q101 VGS maximum is 16V 2
Continuous Drain Current ID 7.1 A VGS = 10V, Notes 7 2
Continuous Drain Current ID 5.7 A VGS = 10V, TA = +70°C, Notes 7 2
Continuous Drain Current ID 5.4 A VGS = 10V, Notes 6 2
Pulsed Drain Current IDM 28 A VGS = 10V, Notes 8 2
Continuous Source Current (Body diode) IS 3.3 A Notes 7 2
Pulsed Source Current (Body diode) ISM 28 A Notes 8 2
Power Dissipation PD 1.25 W Notes 6 & 9 2
Power Dissipation PD 1.8 W Notes 6 & 10 2
Power Dissipation PD 2.14 W Notes 7 & 9 2
Linear Derating Factor 10 mW/C Notes 6 & 9 2
Linear Derating Factor 14.3 mW/C Notes 6 & 10 2
Linear Derating Factor 17.2 mW/C Notes 7 & 9 2
Thermal Resistance, Junction to Ambient RθJA 100 C/W Notes 6 & 9 2
Thermal Resistance, Junction to Ambient RθJA 70 C/W Notes 6 & 10 2
Thermal Resistance, Junction to Ambient RθJA 58 C/W Notes 7 & 9 2
Thermal Resistance, Junction to Lead RθJL 53 C/W Notes 9 & 11 2
Operating and Storage Temperature Range TJ, TSTG -55 150 C 2
Drain-Source Breakdown Voltage BVDSS 40 V ID = 250µA, VGS = 0V 4
Zero Gate Voltage Drain Current IDSS 0.5 µA VDS = 40V, VGS = 0V 4
Gate-Source Leakage IGSS 100 nA VGS = 20V, VDS = 0V 4
Gate Threshold Voltage VGS(th) 1 3 V ID = 250µA, VDS = VGS 4
Static Drain-Source On-Resistance RDS(ON) 0.017 0.027 Ω VGS = 10V, ID = 7A 4
Static Drain-Source On-Resistance RDS(ON) 0.031 0.047 Ω VGS = 4.5V, ID = 6A 4
Diode Forward Voltage VSD 0.86 1.1 V IS = 7A, VGS = 0V 4
Forward Transconductance gfs 22.8 S VDS = 15V, ID = 7A 4
Reverse recovery time trr 12.1 ns IS = 2.1A, di/dt = 100A/µs 4
Reverse recovery charge Qrr 5.1 nC IS = 2.1A, di/dt = 100A/µs 4
Input Capacitance Ciss 604 pF VDS = 20V, VGS = 0V, f = 1MHz 4
Output Capacitance Coss 106 pF VDS = 20V, VGS = 0V, f = 1MHz 4
Reverse Transfer Capacitance Crss 59.6 pF VDS = 20V, VGS = 0V, f = 1MHz 4
Total Gate Charge Qg 6.3 nC VGS = 4.5V, VDS = 20V, ID = 7A 4
Total Gate Charge Qg 12.9 nC VGS = 10V, VDS = 20V, ID = 7A 4
Gate-Source Charge Qgs 2.4 nC VGS = 10V, VDS = 20V, ID = 7A 4
Gate-Drain Charge Qgd 3.3 nC VGS = 10V, VDS = 20V, ID = 7A 4
Turn-On Delay Time tD(on) 3.1 ns VDD = 20V, VGS = 10V, ID = 1A, RG ≈ 6.0Ω 4
Turn-On Rise Time tr 3.1 ns VDD = 20V, VGS = 10V, ID = 1A, RG ≈ 6.0Ω 4
Turn-Off Delay Time tD(off) 15.4 ns VDD = 20V, VGS = 10V, ID = 1A, RG ≈ 6.0Ω 4
Turn-Off Fall Time tf 7.5 ns VDD = 20V, VGS = 10V, ID = 1A, RG ≈ 6.0Ω 4

Materials and finish

As the datasheet states them (page.json metadata.appearance; the 3D model's colours follow it).

Part Material Colour / plating Datasheet says Page
contacts Copper tin  Terminals Connections: See diagram below  Terminals: Finish - Matte Tin annealed over Copper lead frame. 1

CAD (KiCad official)

  • Symbol: DMN4027SSD-13
  • Footprint: Package_SO:SOIC-8_3.9x4.9mm_P1.27mm
  • 3D model: SO-8 (KiCad packages3D, STEP)
  • 3D model files: dmn4027ssd-13-etched.step / dmn4027ssd-13-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); dmn4027ssd-13.step / dmn4027ssd-13.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Diodes Incorporated datasheet (8 pp, sha256 f05a1c46aa9c5885, retrieved 2026-10-27, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (text+vision), consensus claude-opus-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF