component

DMN4026SSD-13

Public Made by Adom

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Diodes Incorporated MOSFETs, SO-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

componenttransistorsdmn4026ssd-13factory-2.0.0extractor-text

Verified DMN4026SSD-13

by Ray · last 13 Nov 2026 · 1 record · files match
SymbolFootprint3D modelPins

Verification log 1 record

13 Nov 2026RayPublished by the parts factory: tier mfr, 8 pinsfiles match
SymbolFootprint3D modelPinsfor all variants
  • ✓component-page-verify: PASS
  • •array (skip): not an array of element pairs
  • ✓cad_props: Datasheet, MPN and distributor properties match page.json
  • ✓component: DMN4026SSD-13 · SO-8 · 8 pins
  • ✓copper: 8 copper pads, none touching another net
  • ✓datasheet: all 8 pin names found in the 6-page datasheet
  • ✓distributor: lcsc C260904, digikey DMN4026SSD-13DITR-ND, mouser 621-DMN4026SSD-13
  • ✓family: SOIC-8_3.9x4.9mm_P1.27mm
  • ✓files: 7 declared files present
  • ✓hero: docs/hero.png 4000x2500
  • ✓lbr: OK: /tmp/cpv-7x5m5rn3/x.lbr is a valid EAGLE .lbr with complete deviceset
  • ✓license: CC-BY-SA-4.0
  • ✓models_3d: 2 records
  • ✓package_fit: height and body within the datasheet's package drawing (datasheet p.5)
  • ✓pads: 8 pins = 8 pads
  • ✓pose: 2 STEP(s) Z-up, seated, centred
  • ✓symbol: 8 pins agree
  • ✓symbol_text: no pin names collide
  • ✓viewers: viewers/footprint.html 24 kB, viewers/symbol.html 10 kB
  • ✓visibility: public, source open
Evidencedatasheet
Verified files✓ dmn4026ssd-13.kicad_sym✓ dmn4026ssd-13.kicad_mod✓ dmn4026ssd-13.step
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Generated by kicad-footprint-generator · KiCad file format 20260206
Name Last commit message Last updated
docs Publish 0.1.0 · Ray
viewers dmn4026ssd-13: viewers rendered from the public page · Ray
dmn4026ssd-13-etched.glb dmn4026ssd-13: factory component page (tier=mfr) · Ray
dmn4026ssd-13-etched.step dmn4026ssd-13: factory component page (tier=mfr) · Ray
dmn4026ssd-13-hero.glb dmn4026ssd-13: hero GLB from the etched model (keeps the MPN mark) · Ray
dmn4026ssd-13-hero.overlay.json dmn4026ssd-13: hero GLB from the etched model (keeps the MPN mark) · Ray
dmn4026ssd-13.glb Publish 0.1.0 · Ray
dmn4026ssd-13.kicad_mod Publish 0.1.0 · Ray
dmn4026ssd-13.kicad_sym Publish 0.1.0 · Ray
dmn4026ssd-13.lbr Publish 0.1.0 · Ray
dmn4026ssd-13.step Publish 0.1.0 · Ray
package.json Publish 0.1.0 · Ray
page.json Set visibility: public · Ray
README.md Publish 0.1.0 · Ray
verification.json Verified: Published by the parts factory: tier mfr, 8 pins · Ray

DMN4026SSD-13

Diodes Incorporated · MOSFETs · SO-8

DMN4026SSD-13 from Diodes Incorporated, in a SO-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model). Symbol and footprint from KiCad-official CAD; the 3D model is generated from the datasheet's package dimensions.

Pinout

Pin Name Type Function
1 S1 passive Source of MOSFET 1 (N-channel, 40V VDSS rating).
2 G1 input Gate of MOSFET 1; gate-source voltage limited to ±20V with threshold of 1V to 3V.
3 S2 passive Source of MOSFET 2 (N-channel, 40V VDSS rating).
4 G2 input Gate of MOSFET 2; gate-source voltage limited to ±20V with threshold of 1V to 3V.
5 D2 passive Drain of MOSFET 2, connected to pin 6; 40V drain-source voltage rating.
6 D2 passive Drain of MOSFET 2, connected to pin 5; 40V drain-source voltage rating.
7 D1 passive Drain of MOSFET 1, connected to pin 8; 40V drain-source voltage rating.
8 D1 passive Drain of MOSFET 1, connected to pin 7; 40V drain-source voltage rating.

Key specifications

Parameter Value
Manufacturer Diodes Incorporated
Package SO-8
Category Transistors
Pins 8

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Drain-Source Voltage VDSS 40 V 2
Gate-Source Voltage VGSS -20 20 V 2
Continuous Drain Current ID 7 A VGS = 10V; Steady State; TA = +25°C 2
Continuous Drain Current ID 5.6 A VGS = 10V; Steady State; TA = +70°C 2
Continuous Drain Current ID 9 A VGS = 10V; t<10s; TA = +25°C 2
Continuous Drain Current ID 7.2 A VGS = 10V; t<10s; TA = +70°C 2
Maximum Continuous Body Diode Forward Current IS 7 A Note 6 2
Pulsed Drain Current IDM 70 A 10µs pulse, duty cycle = 1% 2
Operating and Storage Temperature Range TJ, TSTG -55 150 °C 2
Total Power Dissipation PD 1.3 W TA = +25°C; Note 5 2
Total Power Dissipation PD 0.8 W TA = +70°C; Note 5 2
Total Power Dissipation PD 1.8 W TA = +25°C; Note 6 2
Total Power Dissipation PD 1.1 W TA = +70°C; Note 6 2
Thermal Resistance, Junction to Ambient RθJA 98 °C/W Steady State; Note 5 2
Thermal Resistance, Junction to Ambient RθJA 59 °C/W t<10s; Note 5 2
Thermal Resistance, Junction to Ambient RθJA 71 °C/W Steady State; Note 6 2
Thermal Resistance, Junction to Ambient RθJA 43 °C/W t<10s; Note 6 2
Thermal Resistance, Junction to Case RθJC 11.8 °C/W Note 6 2
Drain-Source Breakdown Voltage BVDSS 40 V VGS = 0V, ID = 250µA 2
Zero Gate Voltage Drain Current IDSS 1 µA VDS = 40V, VGS = 0V 2
Gate-Source Leakage IGSS 100 nA VGS = ±20V, VDS = 0V 2
Gate Threshold Voltage VGS(th) 1 3 V VDS = VGS, ID = 250µA 2
Static Drain-Source On-Resistance RDS(ON) 15 24 mΩ VGS = 10V, ID = 6A 2
Static Drain-Source On-Resistance RDS(ON) 20 32 mΩ VGS = 4.5V, ID = 5A 2
Diode Forward Voltage VSD 0.7 1 V VGS = 0V, IS = 1.0A 2
Total Gate Charge (VGS = 4.5V) Qg 8.8 20 nC VDS = 20V, ID = 8A 2
Total Gate Charge (VGS = 10V) Qg 19.1 43 nC 2
Gate-Source Charge Qgs 3 7.5 nC 2
Gate-Drain Charge Qgd 2.5 6 nC 2

Materials and finish

As the datasheet states them (page.json metadata.appearance; the 3D model's colours follow it).

Part Material Colour / plating Datasheet says Page
housing PC Body Diode Reverse Recovery Charge Qrr  4.15  nC IF = 8A, di/dt = 100A/μs Notes: 5. Device mounted on FR-4 substrate PC board, 2oz copper, with minimum recommended pad layout. 2
contacts Copper tin  Terminal Connections Indicator: See Diagram Below  Terminals: Finish  Matte Tin Annealed over Copper Lead 1

CAD (land: KiCad; 3D: generated from the datasheet)

  • Symbol: DMN4026SSD-13
  • Footprint: Package_SO:SOIC-8_3.9x4.9mm_P1.27mm
  • 3D model: SO-8, generated on the KiCad land (body 3.85 x 4.9 mm, terminals on the pads, 1.45 mm tall, datasheet A, nominal). KiCad's stock model for this land is taller than the datasheet allows, so the model is generated from the datasheet drawing; the dimensions come from the datasheet drawing where it was read and are defaults otherwise (see provenance.model_3d_generated), not the manufacturer's CAD (STEP)
  • 3D model files: dmn4026ssd-13-etched.step / dmn4026ssd-13-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); dmn4026ssd-13.step / dmn4026ssd-13.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Diodes Incorporated datasheet (6 pp, sha256 0b117eb3b1e6a9dd, retrieved 2026-11-13, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (text+vision), consensus claude-opus-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: land: KiCad official libraries (CC-BY-SA 4.0); 3D: generated from the datasheet's package dimensions (provenance.model_3d_generated).

Datasheet PDF