component
DMN3404L-7
Public Made by Adomby adom
Diodes Incorporated MOSFETs, SOT-23. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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Contents
README
markdownDMN3404L-7
Diodes Incorporated · MOSFETs · SOT-23
DMN3404L-7 from Diodes Incorporated, in a SOT-23. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | G | input | Gate; gate-source voltage is rated at ±20V (VGSS) with threshold VGS(th) of 1.0V min to 2.0V max at ID = 250μA. |
| 2 | S | passive | Source terminal of the N-channel MOSFET, shown at the bottom right of the top view; body diode forward voltage is 1.0V max at IS = 1A. |
| 3 | D | passive | Drain, shown at the top of the top view; drain-source voltage is rated at 30V (VDSS) with continuous current up to 5.8A at 25°C and pulsed current of 30A. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Diodes Incorporated |
| Package | SOT-23 |
| Category | Transistors/Thyristors |
| Pins | 3 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Drain-Source Voltage | VDSS | 30 | V | 2 | |||
| Gate-Source Voltage | VGSS | -20 | 20 | V | 2 | ||
| Continuous Drain Current (Note 6) | ID | 4.6 | A | VGS = 10V, steady state, TA = -40°C, Note 6 | 2 | ||
| Continuous Drain Current (Note 6) | ID | 4.2 | A | VGS = 10V, steady state, TA = +25°C, Note 6 | 2 | ||
| Continuous Drain Current (Note 6) | ID | 3 | A | VGS = 10V, steady state, TA = +85°C, Note 6 | 2 | ||
| Continuous Drain Current (Note 7) | ID | 6.2 | A | VGS = 10V, steady state, TA = -40°C, Note 7 | 2 | ||
| Continuous Drain Current (Note 7) | ID | 5.8 | A | VGS = 10V, steady state, TA = +25°C, Note 7 | 2 | ||
| Continuous Drain Current (Note 7) | ID | 4 | A | VGS = 10V, steady state, TA = +85°C, Note 7 | 2 | ||
| Continuous Drain Current (Note 7) | ID | 5.2 | A | VGS = 4.5V, steady state, TA = -40°C, Note 7 | 2 | ||
| Continuous Drain Current (Note 7) | ID | 4.8 | A | VGS = 4.5V, steady state, TA = +25°C, Note 7 | 2 | ||
| Continuous Drain Current (Note 7) | ID | 3.2 | A | VGS = 4.5V, steady state, TA = +85°C, Note 7 | 2 | ||
| Continuous Drain Current (Note 7) | ID | 2.2 | A | VGS = 3V, steady state, TA = -40°C, Note 7 | 2 | ||
| Continuous Drain Current (Note 7) | ID | 2 | A | VGS = 3V, steady state, TA = +25°C, Note 7 | 2 | ||
| Continuous Drain Current (Note 7) | ID | 1 | A | VGS = 3V, steady state, TA = +85°C, Note 7 | 2 | ||
| Pulsed Drain Current | IDM | 30 | A | 2 | |||
| Power Dissipation (Note 6) | PD | 0.72 | W | Note 6: FR-4 PC board, 2oz copper, minimum recommended pad layout | 2 | ||
| Power Dissipation (Note 7) | PD | 1.4 | W | Note 7: FR-4 PC board, 2oz copper, thermal bias to bottom layer 1 inch square copper plate | 2 | ||
| Thermal Resistance, Junction to Ambient (Note 6) | RθJA | 173 | °C/W | @TA = +25°C, Note 6 | 2 | ||
| Thermal Resistance, Junction to Ambient (Note 7) | RθJA | 90 | °C/W | @TA = +25°C, Note 7 | 2 | ||
| Operating and Storage Temperature Range | TJ, TSTG | -55 | 150 | °C | 2 | ||
| Drain-Source Breakdown Voltage | BVDSS | 30 | V | VGS = 0V, ID = 250μA | 3 | ||
| Zero Gate Voltage Drain Current | IDSS | 1 | μA | TJ = +25°C, VDS = 30V, VGS = 0V | 3 | ||
| Gate-Source Leakage | IGSS | -100 | 100 | nA | VGS = ±20V, VDS = 0V | 3 | |
| Gate Threshold Voltage | VGS(th) | 1 | 1.5 | 2 | V | VDS = VGS, ID = 250μA | 3 |
| Static Drain-Source On-Resistance, TJ = -40°C (Note 9) | RDS(on) | 23 | 27 | mΩ | VGS = 4.5V, ID = 4.8A | 3 | |
| Static Drain-Source On-Resistance, TJ = -40°C (Note 9) | RDS(on) | 57 | 74 | mΩ | VGS = 3V, ID = 2A | 3 | |
| Static Drain-Source On-Resistance, TJ = +25°C | RDS(on) | 24 | 28 | mΩ | VGS = 10V, ID = 5.8A | 3 | |
| Static Drain-Source On-Resistance, TJ = +25°C | RDS(on) | 33 | 42 | mΩ | VGS = 4.5V, ID = 4.8A | 3 | |
| Static Drain-Source On-Resistance, TJ = +25°C | RDS(on) | 63 | 82 | mΩ | VGS = 3V, ID = 2A | 3 | |
| Static Drain-Source On-Resistance, TJ = +85°C (Note 9) | RDS(on) | 71 | 95 | mΩ | VGS = 3V, ID = 2A | 3 | |
| Diode Forward Voltage | VSD | 0.75 | 1 | V | VGS = 0V, IS = 1A | 3 | |
| Gate Resistance | Rg | 1.75 | 2.8 | Ω | VDS = 0V, VGS = 0V, f = 1MHz | 3 | |
| Total Gate Charge (VGS = 3V) | Qg | 3.8 | 5.3 | nC | VGS = 3V, VDS = 15V, ID = 1A | 3 | |
| Total Gate Charge (VGS = 4.5V) | Qg | 5.3 | 7.5 | nC | VGS = 10V/4.5V, VDS = 15V, ID = 5.8A | 3 | |
| Total Gate Charge (VGS = 10V) | Qg | 11.3 | 16 | nC | VGS = 10V/4.5V, VDS = 15V, ID = 5.8A | 3 | |
| Turn-On Delay Time | tD(on) | 3.41 | 10 | ns | VDD = 15V, VGS = 10V, RL = 2.6Ω, RG = 3Ω | 3 | |
| Turn-On Rise Time | tr | 6.18 | 13 | ns | VDD = 15V, VGS = 10V, RL = 2.6Ω, RG = 3Ω | 3 | |
| Turn-Off Delay Time | tD(off) | 13.92 | 28 | ns | VDD = 15V, VGS = 10V, RL = 2.6Ω, RG = 3Ω | 3 | |
| Turn-Off Fall Time | tf | 2.84 | 10 | ns | VDD = 15V, VGS = 10V, RL = 2.6Ω, RG = 3Ω | 3 |
Materials and finish
As the datasheet states them (page.json metadata.appearance; the 3D model's colours follow it).
| Part | Material | Colour / plating | Datasheet says | Page |
|---|---|---|---|---|
| contacts | Copper | tin | • Terminals: Finish Matte Tin annealed over Copper leadframe. | 1 |
CAD (KiCad official)
- Symbol:
DMN3404L-7 - Footprint:
Package_TO_SOT_SMD:SOT-23 - 3D model: SOT-23 (KiCad packages3D, STEP)
- 3D model files:
dmn3404l-7-etched.step/dmn3404l-7-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);dmn3404l-7.step/dmn3404l-7.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Diodes Incorporated datasheet (8 pp, sha256
d3d7fd9f4c1bedb7, retrieved 2026-10-17, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-sonnet-5-5(text+vision), consensusclaude-opus-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).