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DMN3060LW-7

Diodes Incorporated · MOSFETs · SOT-323

DMN3060LW-7 from Diodes Incorporated, in a SOT-323. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 G input Gate; gate-source voltage limit is ±12V and threshold VGS(TH) is 0.7V min to 1.8V max at ID = 250µA.
2 S passive Source; body diode forward current is 0.68A max and diode forward voltage is 1.2V max at IS = 1A.
3 D passive Drain; drain-source voltage is 30V max and continuous drain current is 2.6A at TA = +25°C.

Key specifications

Parameter Value
Manufacturer Diodes Incorporated
Package SOT-323
Category Transistors/Thyristors
Pins 3

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Drain-Source Voltage VDSS 30 V TA = +25°C 2
Gate-Source Voltage VGSS -12 12 V TA = +25°C 2
Continuous Drain Current, Steady State ID 2.6 A VGS = 4.5V, TA = +25°C, Note 6 2
Continuous Drain Current, Steady State ID 2.1 A VGS = 4.5V, TA = +70°C, Note 6 2
Pulsed Drain Current IDM 18 A 10µs Pulse, Duty Cycle = 1% 2
Maximum Body Diode Forward Current IS 0.68 A Note 5 2
Total Power Dissipation PD 0.5 W Note 5, TA = +25°C 2
Total Power Dissipation PD 0.64 W Note 6, TA = +25°C 2
Thermal Resistance, Junction to Ambient RθJA 251 °C/W Steady State, Note 5 2
Thermal Resistance, Junction to Ambient RθJA 195 °C/W Steady State, Note 6 2
Operating and Storage Temperature Range TJ, TSTG -55 150 °C 2
Drain-Source Breakdown Voltage BVDSS 30 V VGS = 0V, ID = 250µA 2
Zero Gate Voltage Drain Current IDSS 1 µA VDS = 30V, VGS = 0V, TC = +25°C 2
Gate-Source Leakage IGSS -100 100 nA VGS = ±12V, VDS = 0V 2
Gate Threshold Voltage VGS(TH) 0.7 1.8 V VDS = VGS, ID = 250μA 2
Static Drain-Source On-Resistance RDS(ON) 48 60 mΩ VGS = 10V, ID = 3.1A 2
Static Drain-Source On-Resistance RDS(ON) 51 100 mΩ VGS = 4.5V, ID = 2A 2
Diode Forward Voltage VSD 0.8 1.2 V VGS = 0V, IS = 1A 2
Input Capacitance Ciss 395 pF VDS = 15V, VGS = 0V, f = 1.2MHz 2
Output Capacitance Coss 39 pF VDS = 15V, VGS = 0V, f = 1.2MHz 2
Reverse Transfer Capacitance Crss 26 pF VDS = 15V, VGS = 0V, f = 1.2MHz 2
Gate Resistance Rg 3.1 Ω VDS = 0V, VGS = 0V, f = 1MHz 2
Total Gate Charge Qg 5.6 nC VGS = 4.5V, VDS = 10V, ID = 6A 2
Gate-Source Charge Qgs 0.2 nC VGS = 4.5V, VDS = 10V, ID = 6A 2
Gate-Drain Charge Qgd 1.8 nC VGS = 4.5V, VDS = 10V, ID = 6A 2
Turn-On Delay Time tD(ON) 5.8 ns VDD = 10V, VGS = 15V, RL = 4.7Ω, RG = 3Ω 2
Turn-On Rise Time tR 30.8 ns VDD = 10V, VGS = 15V, RL = 4.7Ω, RG = 3Ω 2
Turn-Off Delay Time tD(OFF) 18.3 ns VDD = 10V, VGS = 15V, RL = 4.7Ω, RG = 3Ω 2
Turn-Off Fall Time tF 2.7 ns VDD = 10V, VGS = 15V, RL = 4.7Ω, RG = 3Ω 2

Materials and finish

As the datasheet states them (page.json metadata.appearance; the 3D model's colours follow it).

Part Material Colour / plating Datasheet says Page
contacts Copper tin  Terminal Connections Indicator: See Diagram  Terminals: Finish  Matte Tin Annealed over Copper Leadframe. 1

CAD (KiCad official)

  • Symbol: DMN3060LW-7
  • Footprint: Package_TO_SOT_SMD:SOT-323_SC-70
  • 3D model: SOT-323 (KiCad packages3D, STEP)
  • 3D model files: dmn3060lw-7-etched.step / dmn3060lw-7-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); dmn3060lw-7.step / dmn3060lw-7.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Diodes Incorporated datasheet (7 pp, sha256 aaa60092dfaf44d5, retrieved 2026-10-27, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (text+vision), consensus claude-opus-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF