# DMN3042L-7

**Diodes Incorporated** · MOSFETs · SOT-23

DMN3042L-7 from Diodes Incorporated, in a SOT-23. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

## Pinout

| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | G | input | Gate; gate-source voltage limited to ±12 V (VGSS) with threshold VGS(th) 0.6 V min to 1.4 V max at ID = 250 µA. |
| 2 | S | passive | Source; continuous body diode forward current limited to 1.5 A (IS). |
| 3 | D | passive | Drain; drain-source voltage rated 30 V (VDSS) with continuous drain current of 5.8 A at TA = +25°C, VGS = 10 V. |

## Key specifications

| Parameter | Value |
|---|---|
| Manufacturer | Diodes Incorporated |
| Package | SOT-23 |
| Category | Transistors/Thyristors |
| Pins | 3 |

## Electrical characteristics

Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).

| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Drain-Source Breakdown Voltage | BVDSS | 30 |  |  | V | VGS = 0V, ID = 250µA | 3 |
| Zero Gate Voltage Drain Current | IDSS |  |  | 1 | µA | VDS = 30V, VGS = 0V | 3 |
| Gate-Source Leakage | IGSS |  |  | 100 | nA | VGS = 12V, VDS = 0V | 3 |
| Gate Threshold Voltage | VGS(th) | 0.6 |  | 1.4 | V | VDS = VGS, ID = 250µA | 3 |
| Static Drain-Source On-Resistance | RDS(on) |  | 21 | 26.5 | mΩ | VGS = 10V, ID = 5.8A | 3 |
| Static Drain-Source On-Resistance | RDS(on) |  | 23 | 32 | mΩ | VGS = 4.5V, ID = 5.0A | 3 |
| Static Drain-Source On-Resistance | RDS(on) |  | 29 | 48 | mΩ | VGS = 2.5V, ID = 4.0A | 3 |
| Diode Forward Voltage | VSD |  | 0.7 | 1.2 | V | VGS = 0V, IS = 1A | 3 |
| Input Capacitance | Ciss |  | 570 | 860 | pF | VDS = 15V, VGS = 0V, f = 1.0MHz | 3 |
| Output Capacitance | Coss |  | 63 | 95 | pF | VDS = 15V, VGS = 0V, f = 1.0MHz | 3 |
| Reverse Transfer Capacitance | Crss |  | 53 | 80 | pF | VDS = 15V, VGS = 0V, f = 1.0MHz | 3 |
| Gate Resistance | RG |  | 3.2 | 4.5 | Ω | VDS = 0V, VGS = 0V, f = 1.0MHz | 3 |
| Total Gate Charge (VGS = 10V) | Qg |  | 13.3 | 20 | nC | VDS = 15V, ID = 6.9A | 3 |
| Total Gate Charge (VGS = 4.5V) | Qg |  | 6.1 | 8 | nC |  | 3 |
| Gate-Source Charge | Qgs |  | 1 | 1.5 | nC |  | 3 |
| Gate-Drain Charge | Qgd |  | 1.6 | 2.5 | nC |  | 3 |
| Turn-On Delay Time | tD(on) |  | 1.5 | 2.4 | nS | VGS = 10V, VDD = 15V, RG = 3Ω, ID = 6.9A | 3 |
| Turn-On Rise Time | tr |  | 3.3 | 5 | nS | VGS = 10V, VDD = 15V, RG = 3Ω, ID = 6.9A | 3 |
| Turn-Off Delay Time | tD(off) |  | 13.9 | 22 | nS | VGS = 10V, VDD = 15V, RG = 3Ω, ID = 6.9A | 3 |
| Turn-Off Fall Time | tf |  | 4.9 | 7 | nS | VGS = 10V, VDD = 15V, RG = 3Ω, ID = 6.9A | 3 |
| Body Diode Reverse Recovery Time | trr |  | 7.8 | 12 | nS | IS = 5A, dI/dt = 100A/μs | 3 |
| Body Diode Reverse Recovery Charge | Qrr |  | 1.9 | 3 | nC | IS = 5A, dI/dt = 100A/μs | 3 |
| Drain-Source Voltage | VDSS |  |  | 30 | V | @ TA = +25°C | 2 |
| Gate-Source Voltage | VGSS | -12 |  | 12 | V | printed as ±12V | 2 |
| Continuous Drain Current (Note 6), VGS = 10V, steady state | ID |  |  | 5.8 | A | TA = +25°C | 2 |
| Continuous Drain Current (Note 6), VGS = 10V, steady state | ID |  |  | 4 | A | TA = +70°C | 2 |
| Maximum Body Diode Forward Current (Note 6) | IS |  |  | 1.5 | A |  | 2 |
| Pulsed Drain Current | IDM |  |  | 30 | A | 10µs pulse, duty cycle = 1% | 2 |
| Power Dissipation (Note 5) | PD |  |  | 0.72 | W | Note 5: FR-4 PCB, 2oz copper, minimum recommended pad layout | 2 |
| Power Dissipation (Note 6) | PD |  |  | 1.4 | W | Note 6: FR-4 PCB, 2oz copper, thermal bias to bottom layer 1inch square copper plate | 2 |
| Thermal Resistance, Junction to Ambient (Note 5), steady state | RθJA |  |  | 171 | °C/W | Note 5: FR-4 PCB, 2oz copper, minimum recommended pad layout | 2 |
| Thermal Resistance, Junction to Ambient (Note 6), steady state | RθJA |  |  | 93 | °C/W | Note 6: FR-4 PCB, 2oz copper, thermal bias to bottom layer 1inch square copper plate | 2 |
| Operating and Storage Temperature Range | TJ, TSTG | -55 |  | 150 | °C |  | 2 |
| Thermal Resistance, Junction to Ambient (Rthja as printed on transient thermal figure) | Rthja |  | 168 |  | °C/W | Printed under Figure 13 (transient thermal resistance), no test conditions given | 6 |

## Materials and finish

As the datasheet states them (page.json `metadata.appearance`; the 3D model's colours follow it).

| Part | Material | Colour / plating | Datasheet says | Page |
|---|---|---|---|---|
| housing | PC |  | Body Diode Reverse Recovery Charge Qrr  1.9 3 nC IS = 5A, dI/dt = 100A/μs Notes: 5. Device mounted on FR-4 substrate PC board, 2oz copper, with minimum recommended pad layout. | 3 |
| contacts | Copper | tin |  Terminals: FinishMatte Tin Annealed over Copper Lead-Frame. | 1 |

## CAD (KiCad official)

- Symbol: `DMN3042L-7`
- Footprint: `Package_TO_SOT_SMD:SOT-23`
- 3D model: SOT-23 (KiCad packages3D, STEP)
- 3D model files: `dmn3042l-7-etched.step` / `dmn3042l-7-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `dmn3042l-7.step` / `dmn3042l-7.glb` are the bare package body.

## Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

- **Datasheet:** [Diodes Incorporated datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8560078546581278720) (8 pp, sha256 `ed019d357d112ffd`, retrieved 2026-10-18, tier: lcsc)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-sonnet-5-5` (text+vision), consensus `claude-opus-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).

[Datasheet PDF](docs/dmn3042l-7-datasheet.pdf)