# DMN3024LSD-HXY

**HXY MOSFET** · MOSFETs · SOP-8

DMN3024LSD-HXY from HXY MOSFET, in a SOP-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

## Pinout

| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | S1 | passive | Source terminal of the first N-channel MOSFET (Q1) in the dual device, which is the return path for its drain current. |
| 2 | G1 | input | Gate terminal of the first N-channel MOSFET (Q1), which controls its switching through VGS (gate-source voltage limit ±20 V per the absolute maximum ratings). |
| 3 | S2 | passive | Source terminal of the second N-channel MOSFET (Q2) in the dual device, which is the return path for its drain current. |
| 4 | G2 | input | Gate terminal of the second N-channel MOSFET (Q2), which controls its switching through VGS (gate-source voltage limit ±20 V per the absolute maximum ratings). |
| 5 | D2 | passive | Drain terminal of the second N-channel MOSFET (Q2); the datasheet rates VDS at 30 V for the device. |
| 6 | D2 | passive | Drain terminal of the second N-channel MOSFET (Q2), internally tied to pin 5; the datasheet rates VDS at 30 V for the device. |
| 7 | D1 | passive | Drain terminal of the first N-channel MOSFET (Q1), internally tied to pin 8; the datasheet rates VDS at 30 V for the device. |
| 8 | D1 | passive | Drain terminal of the first N-channel MOSFET (Q1); the datasheet rates VDS at 30 V for the device. |

## Key specifications

| Parameter | Value |
|---|---|
| Manufacturer | HXY MOSFET |
| Package | SOP-8 |
| Category | Transistors/Thyristors |
| Pins | 8 |

## Electrical characteristics

Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).

| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Drain-Source Voltage | VDS |  |  | 30 | V |  | 1 |
| Gate-Source Voltage | VGS |  |  | 20 | V |  | 1 |
| Drain Current | ID@TA=25℃ |  |  | 8.5 | A | TA=25℃, VGS @ 4.5V | 1 |
| Drain Current | ID@TA=70℃ |  |  | 5.8 | A | TA=70℃, VGS @ 4.5V | 1 |
| Pulsed Drain Current | IDM |  |  | 37 | A |  | 1 |
| Total Power Dissipation | PD@TA=25℃ |  |  | 1.5 | W | TA=25℃ | 1 |
| Storage Temperature Range | TSTG | -55 |  | 150 | ℃ |  | 1 |
| Operating Junction Temperature Range | TJ | -55 |  | 150 | ℃ |  | 1 |
| Maximum Thermal Resistance, Junction-ambient | Rthj-a |  |  | 85 | ℃/W | Junction-ambient | 1 |
| Drain-Source Breakdown Voltage | BVDSS | 30 |  |  | V | VGS=0V, ID=250uA | 2 |
| Static Drain-Source On-Resistance | RDS(ON) |  |  | 18 | mΩ | VGS=10V, ID=7A | 2 |
| Static Drain-Source On-Resistance | RDS(ON) |  |  | 28 | mΩ | VGS=4.5V, ID=4A | 2 |
| Gate Threshold Voltage | VGS(th) | 1.2 |  | 2.5 | V | VGS=VDS, ID=250uA | 2 |
| Drain-Source Leakage Current | IDSS |  |  | 1 | uA | VDS=24V, VGS=0V, TJ=25℃ | 2 |
| Drain-Source Leakage Current | IDSS |  |  | 5 | uA | VDS=24V, VGS=0V, TJ=55℃ | 2 |
| Gate-Source Leakage Current | IGSS | -100 |  | 100 | nA | VGS=±20V, VDS=0V | 2 |
| Continuous Source Current | IS |  |  | 7.3 | A | VG=VD=0V, Force Current | 2 |
| Pulsed Source Current | ISM |  |  | 37 | A |  | 2 |
| Diode Forward Voltage | VSD |  |  | 1.2 | V | VGS=0V, IS=1A, TJ=25℃ | 2 |
| BVDSS Temperature Coefficient | ΔBVDSS/ΔTJ |  | 0.034 |  | V/℃ | Reference to 25℃, ID=1mA | 2 |
| VGS(th) Temperature Coefficient | ΔVGS(th) |  | -5.8 |  | mV/℃ |  | 2 |
| Forward Transconductance | gfs |  | 6 |  | S | VDS=5V, ID=7A | 2 |
| Gate Resistance | Rg |  | 2.5 |  |  | VDS=0V, VGS=0V, f=1MHz | 2 |
| Total Gate Charge (4.5V) | Qg |  | 6 |  | nC | VDS=15V, VGS=4.5V, ID=7A | 2 |
| Gate-Source Charge | Qgs |  | 2.5 |  | nC |  | 2 |
| Gate-Drain Charge | Qgd |  | 2.1 |  | nC |  | 2 |
| Turn-On Delay Time | Td(on) |  | 2.4 |  | ns | VDD=15V, VGS=10V, RG=3.3, ID=7A | 2 |
| Rise Time | Tr |  | 7.8 |  | ns |  | 2 |
| Turn-Off Delay Time | Td(off) |  | 22 |  | ns |  | 2 |
| Fall Time | Tf |  | 4 |  | ns |  | 2 |
| Input Capacitance | Ciss |  | 572 |  | pF | VDS=15V, VGS=0V, f=1MHz | 2 |
| Output Capacitance | Coss |  | 80 |  | pF |  | 2 |
| Reverse Transfer Capacitance | Crss |  | 65 |  | pF |  | 2 |
| Reverse Recovery Time | trr |  | 20 |  | nS | IF=7A, dI/dt=100A/µs, TJ=25℃ | 2 |
| Reverse Recovery Charge | Qrr |  | 1.1 |  | nC |  | 2 |

## CAD (KiCad official)

- Symbol: `DMN3024LSD-HXY`
- Footprint: `Package_SO:SOIC-8_3.9x4.9mm_P1.27mm`
- 3D model: SOP-8 (KiCad packages3D, STEP)
- 3D model files: `dmn3024lsd-hxy-etched.step` / `dmn3024lsd-hxy-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `dmn3024lsd-hxy.step` / `dmn3024lsd-hxy.glb` are the bare package body.

## Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

- **Datasheet:** [HXY MOSFET datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8590909235809509376) (6 pp, sha256 `d2729801e70175f0`, retrieved 2026-10-17, tier: lcsc)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).

[Datasheet PDF](docs/dmn3024lsd-hxy-datasheet.pdf)