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DMN24H11DS-7

Diodes Incorporated · MOSFETs · SOT-23

DMN24H11DS-7 from Diodes Incorporated, in a SOT-23. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model). Symbol and footprint from KiCad-official CAD; the 3D model is generated from the datasheet's package dimensions.

Pinout

Pin Name Type Function
1 G input Gate; maximum gate-source voltage is ±20 V and the gate threshold voltage VGS(th) is 1.0 V min to 3.0 V max at ID = 250 µA.
2 S passive Source; the body diode continuous current IS is 0.27 A maximum (0.8 A pulsed).
3 D passive Drain; drain-source voltage is 240 V maximum and continuous drain current is 0.27 A at TA = +25°C (0.8 A pulsed).

Key specifications

Parameter Value
Manufacturer Diodes Incorporated
Package SOT-23
Category Transistors
Pins 3

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Drain-Source Voltage VDSS 240 V 2
Gate-Source Voltage VGSS -20 20 V 2
Continuous Drain Current (Note 6) ID 0.27 A VGS = 10V, steady state, TA = +25°C 2
Continuous Drain Current (Note 6) ID 0.22 A VGS = 10V, steady state, TA = +70°C 2
Pulsed Drain Current (Note 5) IDM 0.8 A 10µs pulse, duty cycle ≦1% 2
Maximum Body Diode Continuous Current (Note 6) IS 0.27 A 2
Pulsed Body Diode Continuous Current (Note 5) ISM 0.8 A 10µs pulse, duty cycle ≦1% 2
Peak Diode Recovery dv/dt dv/dt 6 V/ns 2
Total Power Dissipation (Note 5) PD 0.75 W Note 5: FR-4 PC board, minimum recommended pad layout, single sided 2
Total Power Dissipation (Note 6) PD 1.2 W Note 6: FR-4, 2oz copper, 1 inch square copper pad layout 2
Thermal Resistance, Junction to Ambient (Note 5) RθJA 166 °C/W Note 5: FR-4 PC board, minimum recommended pad layout 2
Thermal Resistance, Junction to Ambient (Note 6) RθJA 104 °C/W Note 6: FR-4, 2oz copper, 1 inch square copper pad layout 2
Thermal Resistance, Junction to Case (Note 6) RθJC 35 °C/W Note 6 2
Operating and Storage Temperature Range TJ, TSTG -55 150 °C 2
Drain-Source Breakdown Voltage BVDSS 240 V VGS = 0V, ID = 250µA 3
Zero Gate Voltage Drain Current IDSS 100 nA VDS = 240V, VGS = 0V 3
Gate-Body Leakage IGSS -100 100 nA VGS = ±20V, VDS = 0V 3
Gate Threshold Voltage VGS(th) 1 2 3 V VDS = VGS, ID = 250µA 3
Static Drain-Source On-Resistance RDS(ON) 3.7 11 Ω VGS = 10V, ID = 0.3A 3
Static Drain-Source On-Resistance RDS(ON) 4 12 Ω VGS = 4.5V, ID = 0.2A 3
Diode Forward Voltage VSD 0.7 1.2 V VGS = 0V, IS = 0.1A 3

Materials and finish

As the datasheet states them (page.json metadata.appearance; the 3D model's colours follow it).

Part Material Colour / plating Datasheet says Page
contacts tin  Terminals: Solderable per MIL-STD-202, Method 208 Lead Free Plating (Matte Tin Finish Annealed over Alloy 42 1

CAD (land: KiCad; 3D: generated from the datasheet)

  • Symbol: DMN24H11DS-7
  • Footprint: Package_TO_SOT_SMD:SOT-23
  • 3D model: SOT-23, generated on the KiCad land (body 1.3 x 2.9 mm, terminals on the pads, 1.025 mm tall, datasheet A, nominal). KiCad's stock model for this land is taller than the datasheet allows, so the model is generated from the datasheet drawing; the dimensions come from the datasheet drawing where it was read and are defaults otherwise (see provenance.model_3d_generated), not the manufacturer's CAD (STEP)
  • 3D model files: dmn24h11ds-7-etched.step / dmn24h11ds-7-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); dmn24h11ds-7.step / dmn24h11ds-7.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Diodes Incorporated datasheet (8 pp, sha256 74eca58438d84605, retrieved 2026-11-12, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (text+vision), consensus claude-opus-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: land: KiCad official libraries (CC-BY-SA 4.0); 3D: generated from the datasheet's package dimensions (provenance.model_3d_generated).

Datasheet PDF