component
DMN2041LSD-13
Public Made by Adomby adom
Diodes Incorporated MOSFETs, SO-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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Contents
README
markdownDMN2041LSD-13
Diodes Incorporated · MOSFETs · SO-8
DMN2041LSD-13 from Diodes Incorporated, in a SO-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | S1 | passive | Source of N-channel MOSFET 1. |
| 2 | G1 | input | Gate of N-channel MOSFET 1; gate-source voltage rated at ±12V maximum (VGS(th) 0.5V to 1.2V). |
| 3 | S2 | passive | Source of N-channel MOSFET 2. |
| 4 | G2 | input | Gate of N-channel MOSFET 2; gate-source voltage rated at ±12V maximum (VGS(th) 0.5V to 1.2V). |
| 5 | D2 | passive | Drain of N-channel MOSFET 2; drain-source voltage rated at 20V maximum. |
| 6 | D2 | passive | Drain of N-channel MOSFET 2, internally tied to pin 5; drain-source voltage rated at 20V maximum. |
| 7 | D1 | passive | Drain of N-channel MOSFET 1, internally tied to pin 8; drain-source voltage rated at 20V maximum. |
| 8 | D1 | passive | Drain of N-channel MOSFET 1; drain-source voltage rated at 20V maximum. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Diodes Incorporated |
| Package | SO-8 |
| Category | Transistors |
| Pins | 8 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Drain-Source Voltage | VDSS | 20 | V | TA = +25°C | 2 | ||
| Gate-Source Voltage | VGSS | 12 | V | TA = +25°C | 2 | ||
| Drain Current, steady state | ID | 7.63 | A | TA = +25°C, Note 5 | 2 | ||
| Drain Current, steady state | ID | 4.92 | A | TA = +85°C, Note 5 | 2 | ||
| Pulsed Drain Current | IDM | 30 | A | Note 6 | 2 | ||
| Total Power Dissipation | PD | 1.16 | W | Note 5 | 2 | ||
| Thermal Resistance, Junction to Ambient | RθJA | 107.4 | °C/W | TA = +25°C | 2 | ||
| Operating and Storage Temperature Range | TJ, TSTG | -55 | 150 | °C | 2 | ||
| Drain-Source Breakdown Voltage | BVDSS | 20 | V | VGS = 0V, ID = 250μA | 2 | ||
| Zero Gate Voltage Drain Current | IDSS | 1 | μA | TJ = +25°C, VDS = 20V, VGS = 0V | 2 | ||
| Gate-Source Leakage | IGSS | -100 | 100 | nA | VGS = ±12V, VDS = 0V | 2 | |
| Gate Threshold Voltage | VGS(th) | 0.5 | 1.2 | V | VDS = VGS, ID = 250μA | 2 | |
| Static Drain-Source On-Resistance | RDS(ON) | 19 | 28 | mΩ | VGS = 4.5V, ID = 6A | 2 | |
| Static Drain-Source On-Resistance | RDS(ON) | 25 | 41 | mΩ | VGS = 2.5V, ID = 5.2A | 2 | |
| Diode Forward Voltage | VSD | 0.7 | 1.2 | V | VGS = 0V, IS = 1.7A | 2 | |
| Forward Transfer Admittance | /Yfs/ | 6 | S | VDS = 10V, ID = 6A | 2 | ||
| Input Capacitance | Ciss | 550 | pF | VDS =10V, VGS = 0V, f = 1MHz | 2 | ||
| Output Capacitance | Coss | 88 | pF | VDS =10V, VGS = 0V, f = 1MHz | 2 | ||
| Reverse Transfer Capacitance | Crss | 81 | pF | VDS =10V, VGS = 0V, f = 1MHz | 2 | ||
| Gate Resistance | Rg | 1.34 | Ω | VDS = 0V, VGS = 0V, f = 1MHz | 2 | ||
| Total Gate Charge | Qg | 15.6 | nC | VGS = 10V, VDS = 10V, ID = 6A | 2 | ||
| Total Gate Charge | Qg | 7.2 | nC | VGS = 4.5 V, VDS = 10V, ID = 6A | 2 | ||
| Gate-Source Charge | Qgs | 1 | nC | VGS = 4.5 V, VDS = 10V, ID = 6A | 2 | ||
| Gate-Drain Charge | Qgd | 1.9 | nC | VGS = 4.5 V, VDS = 10V, ID = 6A | 2 | ||
| Turn-On Delay Time | tD(on) | 4.69 | ns | VDD = 10V, VGEN = 4.5V, Rg = 1Ω, ID = 6.7A | 2 | ||
| Turn-On Rise Time | tr | 13.19 | ns | VDD = 10V, VGEN = 4.5V, Rg = 1Ω, ID = 6.7A | 2 | ||
| Turn-Off Delay Time | tD(off) | 22.1 | ns | VDD = 10V, VGEN = 4.5V, Rg = 1Ω, ID = 6.7A | 2 | ||
| Turn-Off Fall Time | tf | 6.43 | ns | VDD = 10V, VGEN = 4.5V, Rg = 1Ω, ID = 6.7A | 2 |
Materials and finish
As the datasheet states them (page.json metadata.appearance; the 3D model's colours follow it).
| Part | Material | Colour / plating | Datasheet says | Page |
|---|---|---|---|---|
| contacts | Copper | tin | Terminals Connections: See Diagram Terminals: Finish - Matte Tin annealed over Copper lead frame. | 1 |
CAD (KiCad official)
- Symbol:
DMN2041LSD-13 - Footprint:
Package_SO:SOIC-8_3.9x4.9mm_P1.27mm - 3D model: SO-8 (KiCad packages3D, STEP)
- 3D model files:
dmn2041lsd-13-etched.step/dmn2041lsd-13-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);dmn2041lsd-13.step/dmn2041lsd-13.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Diodes Incorporated datasheet (6 pp, sha256
1f3749bbdead5812, retrieved 2026-10-22, tier: manufacturer) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-sonnet-5-5(text+vision), consensusclaude-opus-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).