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DMN2040UVT-13
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Diodes Incorporated MOSFETs, TSOT-26. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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DMN2040UVT-13
Diodes Incorporated · MOSFETs · TSOT-26
DMN2040UVT-13 from Diodes Incorporated, in a TSOT-26. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | D | passive | Drain terminal of the N-channel MOSFET, rated for a VDSS of 20 V with a continuous ID of 6.7 A at TA = +25°C (steady state, Note 6). |
| 2 | D | passive | Drain terminal of the N-channel MOSFET, rated for a VDSS of 20 V with a continuous ID of 6.7 A at TA = +25°C (steady state, Note 6). |
| 3 | G | input | Gate terminal; the gate-source voltage is limited to VGSS = ±8 V, and VGS(TH) is 0.4 V min to 1.5 V max. |
| 4 | S | passive | Source terminal; the body diode forward current IS is rated at 1.2 A maximum. |
| 5 | D | passive | Drain terminal of the N-channel MOSFET, rated for a VDSS of 20 V with a continuous ID of 6.7 A at TA = +25°C (steady state, Note 6). |
| 6 | D | passive | Drain terminal of the N-channel MOSFET, rated for a VDSS of 20 V with a continuous ID of 6.7 A at TA = +25°C (steady state, Note 6). |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Diodes Incorporated |
| Package | TSOT-26 |
| Category | Transistors/Thyristors |
| Pins | 6 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Drain-Source Breakdown Voltage | BVDSS | 20 | V | VGS = 0V, ID = 250μA | 2 | ||
| Zero Gate Voltage Drain Current | IDSS | 1 | μA | VDS = 16V, VGS = 0V | 2 | ||
| Gate-Source Leakage | IGSS | -100 | 100 | nA | VGS = ±8V, VDS = 0V | 2 | |
| Gate Threshold Voltage | VGS(TH) | 0.4 | 1.5 | V | VDS = VGS, ID = 250μA | 2 | |
| Static Drain-Source On-Resistance | RDS(ON) | 18 | 24 | mΩ | VGS = 4.5V, ID = 6.2A | 2 | |
| Static Drain-Source On-Resistance | RDS(ON) | 24 | 32 | mΩ | VGS = 2.5V, ID = 5.2A | 2 | |
| Diode Forward Voltage | VSD | 0.7 | 1.2 | V | VGS = 0V, IS = 1.3A | 2 | |
| Drain-Source Voltage | VDSS | 20 | V | 2 | |||
| Gate-Source Voltage | VGSS | -8 | 8 | V | 2 | ||
| Continuous Drain Current | ID | 6.7 | A | VGS = 4.5V, steady state, TA = +25°C (Note 6) | 2 | ||
| Continuous Drain Current | ID | 5.3 | A | VGS = 4.5V, steady state, TA = +75°C (Note 6) | 2 | ||
| Maximum Body Diode Forward Current | IS | 1.2 | A | Note 6 | 2 | ||
| Pulsed Drain Current | IDM | 40 | A | 10μs pulse, duty cycle = 1% | 2 | ||
| Total Power Dissipation | PD | 1.2 | W | Note 5: FR-4 PC board, minimum recommended pad layout, single sided | 2 | ||
| Thermal Resistance, Junction to Ambient (steady state) | RJA | 104 | °C/W | Note 5: FR-4 PC board, minimum recommended pad layout, single sided | 2 | ||
| Total Power Dissipation | PD | 1.6 | W | Note 6: FR-4, 2oz copper, thermal vias to bottom layer, 1 inch square copper plate | 2 | ||
| Thermal Resistance, Junction to Ambient (steady state) | RJA | 77 | °C/W | Note 6: FR-4, 2oz copper, thermal vias to bottom layer, 1 inch square copper plate | 2 | ||
| Operating and Storage Temperature Range | TJ, TSTG | -55 | 150 | °C | 2 | ||
| Transient Thermal Resistance basis (junction to ambient) | RθJA | 100 | ℃/W | Figure 13 transient thermal curve normalization, RθJA(t) = r(t) * RθJA | 5 |
Materials and finish
As the datasheet states them (page.json metadata.appearance; the 3D model's colours follow it).
| Part | Material | Colour / plating | Datasheet says | Page |
|---|---|---|---|---|
| contacts | Copper | tin | Terminal Connections: See Diagram Terminals: Finish, Tin Finish Annealed over Copper Leadframe. | 1 |
CAD (KiCad official)
- Symbol:
DMN2040UVT-13 - Footprint:
Package_TO_SOT_SMD:TSOT-23-6 - 3D model: TSOT-26 (KiCad packages3D, STEP)
- 3D model files:
dmn2040uvt-13-etched.step/dmn2040uvt-13-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);dmn2040uvt-13.step/dmn2040uvt-13.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Diodes Incorporated datasheet (7 pp, sha256
6be0f15c5a73b75c, retrieved 2026-10-20, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# DMN2040UVT-13
**Diodes Incorporated** · MOSFETs · TSOT-26
DMN2040UVT-13 from Diodes Incorporated, in a TSOT-26. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | D | passive | Drain terminal of the N-channel MOSFET, rated for a VDSS of 20 V with a continuous ID of 6.7 A at TA = +25°C (steady state, Note 6). |
| 2 | D | passive | Drain terminal of the N-channel MOSFET, rated for a VDSS of 20 V with a continuous ID of 6.7 A at TA = +25°C (steady state, Note 6). |
| 3 | G | input | Gate terminal; the gate-source voltage is limited to VGSS = ±8 V, and VGS(TH) is 0.4 V min to 1.5 V max. |
| 4 | S | passive | Source terminal; the body diode forward current IS is rated at 1.2 A maximum. |
| 5 | D | passive | Drain terminal of the N-channel MOSFET, rated for a VDSS of 20 V with a continuous ID of 6.7 A at TA = +25°C (steady state, Note 6). |
| 6 | D | passive | Drain terminal of the N-channel MOSFET, rated for a VDSS of 20 V with a continuous ID of 6.7 A at TA = +25°C (steady state, Note 6). |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Diodes Incorporated |
| Package | TSOT-26 |
| Category | Transistors/Thyristors |
| Pins | 6 |
## Electrical characteristics
Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Drain-Source Breakdown Voltage | BVDSS | 20 | | | V | VGS = 0V, ID = 250μA | 2 |
| Zero Gate Voltage Drain Current | IDSS | | | 1 | μA | VDS = 16V, VGS = 0V | 2 |
| Gate-Source Leakage | IGSS | -100 | | 100 | nA | VGS = ±8V, VDS = 0V | 2 |
| Gate Threshold Voltage | VGS(TH) | 0.4 | | 1.5 | V | VDS = VGS, ID = 250μA | 2 |
| Static Drain-Source On-Resistance | RDS(ON) | | 18 | 24 | mΩ | VGS = 4.5V, ID = 6.2A | 2 |
| Static Drain-Source On-Resistance | RDS(ON) | | 24 | 32 | mΩ | VGS = 2.5V, ID = 5.2A | 2 |
| Diode Forward Voltage | VSD | | 0.7 | 1.2 | V | VGS = 0V, IS = 1.3A | 2 |
| Drain-Source Voltage | VDSS | | | 20 | V | | 2 |
| Gate-Source Voltage | VGSS | -8 | | 8 | V | | 2 |
| Continuous Drain Current | ID | | | 6.7 | A | VGS = 4.5V, steady state, TA = +25°C (Note 6) | 2 |
| Continuous Drain Current | ID | | | 5.3 | A | VGS = 4.5V, steady state, TA = +75°C (Note 6) | 2 |
| Maximum Body Diode Forward Current | IS | | | 1.2 | A | Note 6 | 2 |
| Pulsed Drain Current | IDM | | | 40 | A | 10μs pulse, duty cycle = 1% | 2 |
| Total Power Dissipation | PD | | | 1.2 | W | Note 5: FR-4 PC board, minimum recommended pad layout, single sided | 2 |
| Thermal Resistance, Junction to Ambient (steady state) | RJA | | | 104 | °C/W | Note 5: FR-4 PC board, minimum recommended pad layout, single sided | 2 |
| Total Power Dissipation | PD | | | 1.6 | W | Note 6: FR-4, 2oz copper, thermal vias to bottom layer, 1 inch square copper plate | 2 |
| Thermal Resistance, Junction to Ambient (steady state) | RJA | | | 77 | °C/W | Note 6: FR-4, 2oz copper, thermal vias to bottom layer, 1 inch square copper plate | 2 |
| Operating and Storage Temperature Range | TJ, TSTG | -55 | | 150 | °C | | 2 |
| Transient Thermal Resistance basis (junction to ambient) | RθJA | | 100 | | ℃/W | Figure 13 transient thermal curve normalization, RθJA(t) = r(t) * RθJA | 5 |
## Materials and finish
As the datasheet states them (page.json `metadata.appearance`; the 3D model's colours follow it).
| Part | Material | Colour / plating | Datasheet says | Page |
|---|---|---|---|---|
| contacts | Copper | tin | Terminal Connections: See Diagram Terminals: Finish, Tin Finish Annealed over Copper Leadframe. | 1 |
## CAD (KiCad official)
- Symbol: `DMN2040UVT-13`
- Footprint: `Package_TO_SOT_SMD:TSOT-23-6`
- 3D model: TSOT-26 (KiCad packages3D, STEP)
- 3D model files: `dmn2040uvt-13-etched.step` / `dmn2040uvt-13-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `dmn2040uvt-13.step` / `dmn2040uvt-13.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [Diodes Incorporated datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8559511890541518848) (7 pp, sha256 `6be0f15c5a73b75c`, retrieved 2026-10-20, tier: lcsc)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/dmn2040uvt-13-datasheet.pdf)