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DMN2019UTS-13

Public Made by Adom

by adom

Diodes Incorporated MOSFETs, TSSOP-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

componenttransistorsdmn2019uts-13factory-2.0.0extractor-text

Verified DMN2019UTS-13

by Ray · last 5 Nov 2026 · 1 record · files match
SymbolFootprint3D modelPins

Verification log 1 record

5 Nov 2026RayPublished by the parts factory: tier mfr, 8 pinsfiles match
SymbolFootprint3D modelPinsfor all variants
  • ✓component-page-verify: PASS
  • ✓cad_props: Datasheet, MPN and distributor properties match page.json
  • ✓component: DMN2019UTS-13 · TSSOP-8 · 8 pins
  • ✓copper: 8 copper pads, none touching another net
  • ✓datasheet: all 8 pin names found in the 6-page datasheet
  • ✓distributor: lcsc C260947, digikey DMN2019UTS-13DITR-ND, mouser 621-DMN2019UTS-13
  • ✓family: TSSOP-8_4.4x3mm_P0.65mm
  • ✓files: 7 declared files present
  • ✓hero: docs/hero.png 4000x2500
  • ✓lbr: OK: /tmp/cpv-5s6731fh/x.lbr is a valid EAGLE .lbr with complete deviceset
  • ✓license: CC-BY-SA-4.0
  • ✓models_3d: 2 records
  • ✓package_fit: height and body within the datasheet's package drawing (datasheet p.5)
  • ✓pads: 8 pins = 8 pads
  • ✓pose: 2 STEP(s) Z-up, seated, centred
  • ✓symbol: 8 pins agree
  • ✓symbol_text: no pin names collide
  • ✓visibility: public, source open
Evidencedatasheet
Verified files✓ dmn2019uts-13.kicad_sym✓ dmn2019uts-13.kicad_mod✓ dmn2019uts-13.step
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3D Model

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Symbol & Footprint

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Contents

README

markdown

DMN2019UTS-13

Diodes Incorporated · MOSFETs · TSSOP-8

DMN2019UTS-13 from Diodes Incorporated, in a TSSOP-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 D passive Drain, tied internally to pins 8 (common drain of the dual N-channel MOSFET); ratings 20V VDSS.
2 S1 passive Source of MOSFET 1.
3 S1 passive Source of MOSFET 1.
4 G1 input Gate of MOSFET 1, ESD protected to 2kV with gate-source rating of ±12V.
5 G2 input Gate of MOSFET 2, ESD protected to 2kV with gate-source rating of ±12V.
6 S2 passive Source of MOSFET 2.
7 S2 passive Source of MOSFET 2.
8 D passive Drain, tied internally to pin 1 (common drain of the dual N-channel MOSFET); ratings 20V VDSS.

Key specifications

Parameter Value
Manufacturer Diodes Incorporated
Package TSSOP-8
Category Transistors
Pins 8

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Drain-Source Breakdown Voltage BVDSS 20 V VGS = 0V, ID = 250μA 2
Zero Gate Voltage Drain Current IDSS 1 µA VDS = 20V, VGS = 0V 2
Gate-Source Leakage IGSS 10 µA VGS = ±10V, VDS = 0V 2
Gate-Source Breakdown Voltage BVSGS -12 12 V VDS = 0V, IG = ±250μA 2
Gate Threshold Voltage VGS(th) 0.35 0.95 V VDS = VGS, ID = 250μA 2
Static Drain-Source On-Resistance RDS(ON) 15.5 18.5 mΩ VGS = 10V, ID = 7A 2
Static Drain-Source On-Resistance RDS(ON) 16.5 21 mΩ VGS = 4.5V, ID = 7A 2
Static Drain-Source On-Resistance RDS(ON) 17 21.5 mΩ VGS = 4.0V, ID = 7A 2
Static Drain-Source On-Resistance RDS(ON) 17.5 22.5 mΩ VGS = 3.6V, ID = 6.5A 2
Static Drain-Source On-Resistance RDS(ON) 18 23 mΩ VGS = 3.1V, ID = 6.5A 2
Static Drain-Source On-Resistance RDS(ON) 19 24 mΩ VGS = 2.5V, ID = 5.5A 2
Static Drain-Source On-Resistance RDS(ON) 24 31 mΩ VGS = 1.8V, ID = 3.5A 2
Diode Forward Voltage VSD 0.7 1 V VGS = 0V, IS = 1A 2
Drain-Source Voltage VDSS 20 V 2
Gate-Source Voltage VGSS -12 12 V 2
Continuous Drain Current ID 5.4 A Note 5, VGS = 10V, steady state, TA = +25°C 2
Continuous Drain Current ID 4.3 A Note 5, VGS = 10V, steady state, TA = +70°C 2
Continuous Drain Current ID 4.6 A Note 5, VGS = 2.5V, steady state, TA = +25°C 2
Continuous Drain Current ID 3.7 A Note 5, VGS = 2.5V, steady state, TA = +70°C 2
Continuous Body Diode Forward Current IS 0.9 A Note 5, steady state, TA = +25°C 2
Pulsed Drain Current IDM 30 A Note 5, 10μs pulse, duty cycle = 1% 2
Total Power Dissipation PD 0.78 W Note 5 2
Thermal Resistance, Junction to Ambient RθJA 161 °C/W Note 5 2
Thermal Resistance, Junction to Case RθJC 26 °C/W Note 5 2
Operating and Storage Temperature Range TJ, TSTG -55 150 °C 2

CAD (KiCad official)

  • Symbol: DMN2019UTS-13
  • Footprint: Package_SO:TSSOP-8_4.4x3mm_P0.65mm
  • 3D model: TSSOP-8 (KiCad packages3D, STEP)
  • 3D model files: dmn2019uts-13-etched.step / dmn2019uts-13-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); dmn2019uts-13.step / dmn2019uts-13.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Diodes Incorporated datasheet (6 pp, sha256 36fbc3d81b92f721, retrieved 2026-11-05, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (text+vision), consensus claude-opus-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF