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Contents

README

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DMN2016UTS-13

Diodes Incorporated · MOSFETs · TSSOP-8

DMN2016UTS-13 from Diodes Incorporated, in a TSSOP-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 D passive Drain connection, tied internally to D2 (pin 8) per the internal schematic; VDSS 20 V max.
2 S1 passive Source of MOSFET 1; continuous drain current 8.58 A at TA = 25°C.
3 S1 passive Source of MOSFET 1, same net as pin 2; continuous drain current 8.58 A at TA = 25°C.
4 G1 input Gate of MOSFET 1 with ESD protection to 2 kV; VGSS ±8 V max, threshold 0.4 to 1.0 V.
5 G2 input Gate of MOSFET 2 with ESD protection to 2 kV; VGSS ±8 V max, threshold 0.4 to 1.0 V.
6 S2 passive Source of MOSFET 2, same net as pin 7; continuous drain current 8.58 A at TA = 25°C.
7 S2 passive Source of MOSFET 2; continuous drain current 8.58 A at TA = 25°C.
8 D passive Drain connection, tied internally to D1 (pin 1) per the internal schematic; VDSS 20 V max.

Key specifications

Parameter Value
Manufacturer Diodes Incorporated
Package TSSOP-8
Category Transistors/Thyristors
Pins 8

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Drain-Source Voltage VDSS 20 V 1
Gate-Source Voltage VGSS -8 8 V 1
Continuous Drain Current ID 8.58 A Steady state, TA = 25°C (Note 3) 1
Continuous Drain Current ID 5.73 A Steady state, TA = 85°C (Note 3) 1
Pulsed Drain Current IDM 36 A Repetitive rating, pulse width limited by junction temperature (Note 4) 1
Power Dissipation PD 0.88 W Device mounted on FR-4 PCB, minimum recommended pad layout (Note 3) 1
Operating and Storage Temperature Range TJ, TSTG -55 150 °C 1
Drain-Source Breakdown Voltage BVDSS 20 V VGS = 0V, ID = 250μA 2
Zero Gate Voltage Drain Current IDSS 1 μA TJ = 25°C, VDS = 20V, VGS = 0V 2
Gate-Source Leakage IGSS -10 10 μA VGS = ±8V, VDS = 0V 2
Gate Threshold Voltage VGS(th) 0.4 0.72 1 V VDS = VGS, ID = 250μA 2
Static Drain-Source On-Resistance RDS(ON) 11 14.5 mΩ VGS = 4.5V, ID = 9.4A 2
Static Drain-Source On-Resistance RDS(ON) 13 16.5 mΩ VGS = 2.5V, ID = 8.3A 2
Diode Forward Voltage VSD 0.65 1.2 V VGS = 0V, IS = 1.3A 2
Thermal Resistance, Junction to Ambient RθJA 141.57 °C/W TA = 25°C (Note 3) 1

CAD (KiCad official)

  • Symbol: DMN2016UTS-13
  • Footprint: Package_SO:TSSOP-8_3x3mm_P0.65mm
  • 3D model: TSSOP-8 (KiCad packages3D, STEP)
  • 3D model files: dmn2016uts-13-etched.step / dmn2016uts-13-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); dmn2016uts-13.step / dmn2016uts-13.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Diodes Incorporated datasheet (6 pp, sha256 5c341694428299e5, retrieved 2026-10-18, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (text+vision), consensus claude-opus-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF