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DMN2009LSS-13-JSM
Public Made by Adomby adom
JSMSEMI MOSFETs, SOP-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownDMN2009LSS-13-JSM
JSMSEMI · MOSFETs · SOP-8
DMN2009LSS-13-JSM from JSMSEMI, in a SOP-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | S | passive | Source of the N-channel MOSFET, pin 1 at the dot-marked corner of the SOP8 package. |
| 2 | S | passive | Source of the N-channel MOSFET. |
| 3 | S | passive | Source of the N-channel MOSFET. |
| 4 | G | input | Gate of the N-channel MOSFET; VGSS is ±20 V max and threshold is 1.0 to 3.0 V at ID=250uA. |
| 5 | D | passive | Drain of the N-channel MOSFET; VDSS is 30 V max. |
| 6 | D | passive | Drain of the N-channel MOSFET; VDSS is 30 V max. |
| 7 | D | passive | Drain of the N-channel MOSFET; VDSS is 30 V max. |
| 8 | D | passive | Drain of the N-channel MOSFET; VDSS is 30 V max. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | JSMSEMI |
| Package | SOP-8 |
| Category | Transistors/Thyristors |
| Pins | 8 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Drain-Source Voltage | VDSS | 30 | V | TA=25℃ | 1 | ||
| Gate-Source Voltage | VGSS | -20 | 20 | V | 1 | ||
| Continuous Drain Current | ID | 15 | A | TA=25℃, VGS=10V | 1 | ||
| Continuous Drain Current | ID | 12 | A | TA=70℃ | 1 | ||
| Pulsed Drain Current | IDM | 40 | A | 1 | |||
| Continuous Source Current (Diode Conduction) | IS | 2 | A | 1 | |||
| Power Dissipation | PD | 3 | W | TA=25℃ | 1 | ||
| Power Dissipation | PD | 2.1 | W | TA=70℃ | 1 | ||
| Operation Junction Temperature | TJ | 150 | ℃ | 1 | |||
| Storage Temperature Range | TSTG | -55 | 150 | ℃ | 1 | ||
| Thermal Resistance Junction to Ambient | RθJA | 85 | ℃/W | 1 | |||
| Drain-Source Breakdown Voltage | V(BR)DSS | 30 | V | VGS=0V, ID=250uA | 2 | ||
| Gate Threshold Voltage | VGS(th) | 1 | 1.5 | 3 | V | VDS=VGS, ID=250uA | 2 |
| Gate Leakage Current | IGSS | -100 | 100 | nA | VDS=0V, VGS=±20V | 2 | |
| Zero Gate Voltage Drain Current | IDSS | 1 | uA | VDS=20V, VGS=0 | 2 | ||
| Zero Gate Voltage Drain Current | IDSS | 5 | uA | VDS=20V, VGS=0, TJ=55℃ | 2 | ||
| Drain-Source On-Resistance | RDS(ON) | 6.5 | 8 | mΩ | VGS=10V, ID=10A | 2 | |
| Drain-Source On-Resistance | RDS(ON) | 10 | 18 | mΩ | VGS=4.5V, ID=8A | 2 | |
| Diode Forward Voltage | VSD | 0.71 | 1 | V | IS=1.0A, VGS=0V | 2 | |
| Total Gate Charge | Qg | 16 | 20.8 | nC | VDS=15V, VGS=4.5V, ID=14A | 2 | |
| Gate-Source Charge | Qgs | 5 | 6.5 | nC | 2 | ||
| Gate-Drain Charge | Qgd | 3 | 3.9 | nC | 2 | ||
| Turn-On Time (delay) | Td(on) | 17 | 34 | nS | VDS=15V, ID=14A, VGEN=10V, RG=6Ω | 2 | |
| Turn-On Rise Time | Tr | 5 | 10 | nS | 2 | ||
| Turn-Off Time (delay) | Td(off) | 50 | 100 | nS | 2 | ||
| Turn-Off Fall Time | Tf | 10 | 20 | nS | 2 | ||
| Input Capacitance | Ciss | 986 | pF | VDS=15V, VGS=0V, f=1MHz | 2 | ||
| Output Capacitance | Coss | 325 | pF | 2 | |||
| Reverse Transfer Capacitance | Crss | 185 | pF | 2 |
CAD (KiCad official)
- Symbol:
DMN2009LSS-13-JSM - Footprint:
Package_SO:SOIC-8_3.9x4.9mm_P1.27mm - 3D model: SOP-8 (KiCad packages3D, STEP)
- 3D model files:
dmn2009lss-13-jsm-etched.step/dmn2009lss-13-jsm-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);dmn2009lss-13-jsm.step/dmn2009lss-13-jsm.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: JSMSEMI datasheet (5 pp, sha256
07e12bf40a453fc4, retrieved 2026-10-18, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-sonnet-5-5(text+vision), consensusclaude-opus-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).