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DMG6968UDM-7

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Diodes Incorporated MOSFETs, SOT-26. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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DMG6968UDM-7

Diodes Incorporated · MOSFETs · SOT-26

DMG6968UDM-7 from Diodes Incorporated, in a SOT-26. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 S1 passive Source of N-channel MOSFET 1 (Q1), shown at the pin-1 dot corner in the top-view pin configuration.
2 D1/D2 passive Common drain of both N-channel MOSFETs, internally tied to pin 5 (drains shown joined in the equivalent circuit).
3 S2 passive Source of N-channel MOSFET 2 (Q2).
4 G2 input Gate of N-channel MOSFET 2 (Q2), ESD protected up to 2kV HBM with VGSS rated ±12V (AEC-Q101 maximum ±9.6V).
5 D1/D2 passive Common drain of both N-channel MOSFETs, internally tied to pin 2 (drains shown joined in the equivalent circuit).
6 G1 input Gate of N-channel MOSFET 1 (Q1), ESD protected up to 2kV HBM with VGSS rated ±12V (AEC-Q101 maximum ±9.6V).

Key specifications

Parameter Value
Manufacturer Diodes Incorporated
Package SOT-26
Category Transistors
Pins 6

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Drain-Source Voltage VDSS 20 V TA = +25°C 2
Gate-Source Voltage VGSS -12 12 V TA = +25°C; AEC-Q101 VGS max is ±9.6V 2
Continuous Drain Current ID 6.5 A TA = +25°C 2
Continuous Drain Current ID 5.2 A TA = +70°C 2
Pulsed Drain Current IDM 30 A TA = +25°C 2
Total Power Dissipation PD 0.85 W TA = +25°C 2
Thermal Resistance, Junction to Ambient RθJA 147 °C/W t ≤10s 2
Operating and Storage Temperature Range TJ, TSTG -55 150 °C 2
Drain-Source Breakdown Voltage BVDSS 20 V ID = 250µA, VGS = 0V 2
Zero Gate Voltage Drain Current IDSS 1 µA VDS = 20V, VGS = 0V 2
Gate-Body Leakage Current IGSS -10 10 µA VDS = 0V, VGS = ±10V 2
Gate-Source Breakdown Voltage BVSGS -12 12 V VDS = 0V, IG = ±250µA 2
Gate Threshold Voltage VGS(th) 0.5 0.9 V VDS = VGS, ID = 250µA 2
Static Drain-Source On-Resistance RDS(ON) 17 24 mΩ VGS = 4.5V, ID = 6.5A 2
Static Drain-Source On-Resistance RDS(ON) 20 28 mΩ VGS = 2.5V, ID = 5.5A 2
Static Drain-Source On-Resistance RDS(ON) 26 34 mΩ VGS = 1.8V, ID = 3.5A 2
Diode Forward Voltage VSD 0.7 1 V IS = 2.25A, VGS = 0V 2
Forward Transfer Admittance /YFS/ 8 S VDS = 10V, ID = 5A 2
Input Capacitance Ciss 143 pF VDS = 10V, VGS = 0V, f = 1.0MHz 2
Output Capacitance Coss 74 pF VDS = 10V, VGS = 0V, f = 1.0MHz 2
Reverse Transfer Capacitance Crss 29 pF VDS = 10V, VGS = 0V, f = 1.0MHz 2
Gate Resistance RG 202 Ω VGS = 0V, VDS = 0V, f = 1MHz 2
Total Gate Charge Qg 8.8 nC VGS = 4.5V, VDS = 10V, ID = 6.5A 2
Gate-Source Charge Qgs 1.4 nC VGS = 4.5V, VDS = 10V, ID = 6.5A 2
Gate-Drain Charge Qgd 3 nC VGS = 4.5V, VDS = 10V, ID = 6.5A 2
Turn-On Delay Time tD(on) 53 ns VDD = 10V, VGS = 4.5V, RL = 10Ω, RG = 6Ω 2
Turn-On Rise Time tr 78 ns VDD = 10V, VGS = 4.5V, RL = 10Ω, RG = 6Ω 2
Turn-Off Delay Time tD(off) 562 ns VDD = 10V, VGS = 4.5V, RL = 10Ω, RG = 6Ω 2
Turn-Off Fall Time tf 234 ns VDD = 10V, VGS = 4.5V, RL = 10Ω, RG = 6Ω 2

Materials and finish

As the datasheet states them (page.json metadata.appearance; the 3D model's colours follow it).

Part Material Colour / plating Datasheet says Page
contacts Copper tin • Terminals: Finish, Matte Tin annealed over Copper leadframe 1

CAD (KiCad official)

  • Symbol: DMG6968UDM-7
  • Footprint: Package_TO_SOT_SMD:SOT-23-6
  • 3D model: SOT-26 (KiCad packages3D, STEP)
  • 3D model files: dmg6968udm-7-etched.step / dmg6968udm-7-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); dmg6968udm-7.step / dmg6968udm-7.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Diodes Incorporated datasheet (6 pp, sha256 080fcb396e49d5a1, retrieved 2026-10-22, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (text+vision), consensus claude-opus-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF