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DMG2307LQ

Public Made by Adom

by adom

Leiditech MOSFETs, SOT-23. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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Symbol & Footprint

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Datasheet

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Contents

README

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DMG2307LQ

Leiditech · MOSFETs · SOT-23

DMG2307LQ from Leiditech, in a SOT-23. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 G input Gate; gate-source voltage limited to ±20 V with threshold of -1.0 V min to -2.4 V max at ID=-250μA.
2 S passive Source; continuous body-diode current is -4.1 A max.
3 D passive Drain; drain-source voltage -30 V max, continuous drain current -4.1 A at TA=25℃ and pulsed -15 A.

Key specifications

Parameter Value
Manufacturer Leiditech
Package SOT-23
Category Transistors/Thyristors
Pins 3

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Drain-source Voltage VDS -30 V TA=25℃ 1
Gate-source Voltage VGS -20 20 V TA=25℃ 1
Drain Current ID -4.1 A TA=25℃ @ Steady State 1
Drain Current ID -3.2 A TA=70℃ @ Steady State 1
Pulsed Drain Current IDM -15 A 1
Total Power Dissipation PD 1.5 W TA=25℃ 1
Thermal Resistance Junction-to-Ambient RθJA 82 ℃/W Steady State 1
Junction and Storage Temperature Range TJ,TSTG -55 150 ℃ 1
Drain-Source Breakdown Voltage BVDSS -30 V VGS=0V, ID=-250μA 2
Zero Gate Voltage Drain Current IDSS -1 μA VDS=-30V,VGS=0V,TC=25℃ 2
Gate-Body Leakage Current IGSS -100 100 nA VGS=±20V, VDS=0V 2
Gate Threshold Voltage VGS(th) -1 -1.5 -2.4 V VDS=VGS, ID=-250μA 2
Static Drain-Source On-Resistance RDS(ON) 46 60 mΩ VGS=-10V, ID=-4.1A 2
Static Drain-Source On-Resistance RDS(ON) 58 75 mΩ VGS=-4.5V, ID=-3.5A 2
Diode Forward Voltage VSD -0.8 -1.2 V IS=-4.1A,VGS=0V 2
Maximum Body-Diode Continuous Current IS -4.1 A 2
Input Capacitance Ciss 580 pF VDS=-15V,VGS=0V,f=1MHZ 2
Output Capacitance Coss 98 pF VDS=-15V,VGS=0V,f=1MHZ 2
Reverse Transfer Capacitance Crss 74 pF VDS=-15V,VGS=0V,f=1MHZ 2
Total Gate Charge Qg 6.8 nC VGS=-10V,VDS=-15V,ID=-4.1A 2
Gate Source Charge Qgs 1 nC VGS=-10V,VDS=-15V,ID=-4.1A 2
Gate Drain Charge Qgd 1.4 nC VGS=-10V,VDS=-15V,ID=-4.1A 2
Turn-on Delay Time tD(on) 14 ns VGS=-10V,VDD=-15V, RL=15Ω,ID=-1A,RGEN=2.5Ω 2
Turn-on Rise Time tr 61 ns VGS=-10V,VDD=-15V, RL=15Ω,ID=-1A,RGEN=2.5Ω 2
Turn-off Delay Time tD(off) 19 ns VGS=-10V,VDD=-15V, RL=15Ω,ID=-1A,RGEN=2.5Ω 2
Turn-off Fall Time tf 10 ns VGS=-10V,VDD=-15V, RL=15Ω,ID=-1A,RGEN=2.5Ω 2

CAD (KiCad official)

  • Symbol: DMG2307LQ
  • Footprint: Package_TO_SOT_SMD:SOT-23
  • 3D model: SOT-23 (KiCad packages3D, STEP)
  • 3D model files: dmg2307lq-etched.step / dmg2307lq-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); dmg2307lq.step / dmg2307lq.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Leiditech datasheet (5 pp, sha256 17a043a3e6cadcf7, retrieved 2026-10-27, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (text+vision), consensus claude-opus-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF