component
DMG1024UV-7
Public Made by Adomby adom
Diodes Incorporated Voltage Regulators - Linear, Low Drop Out (LDO) Regulators, SOT-563. Pinout extracted from the datasheet, KiCad symbol/footprint/3D.
← Commit history
orderable attributes: rebuild .lbr with adom-lbr 2.18.0 so MPN, MANUFACTURER and the distributor part numbers reach <technology> (LCSC_PN C2759893). The published library carried no attributes at all, so a BOM had nothing to buy from. Distributor PNs matched on exact MPN AND corroborating manufacturer.
2 files changed
+27−7
dmg1024uv-7.lbr+20−2@@ -60,11 +60,23 @@ <smd name="4" x="0.7125" y="-0.5000" dx="0.6750" dy="0.3500" layer="1"/> <smd name="5" x="0.7125" y="-0.0000" dx="0.6750" dy="0.3500" layer="1"/> <smd name="6" x="0.7125" y="0.5000" dx="0.6750" dy="0.3500" layer="1"/>+ <polygon width="0.1200" layer="21">+ <vertex x="-0.7200" y="0.9400"/>+ <vertex x="-0.8600" y="1.1300"/>+ <vertex x="-0.5800" y="1.1300"/>+ </polygon>+ <polygon width="0.1000" layer="51">+ <vertex x="-0.3000" y="0.8000"/>+ <vertex x="0.6000" y="0.8000"/>+ <vertex x="0.6000" y="-0.8000"/>+ <vertex x="-0.6000" y="-0.8000"/>+ <vertex x="-0.6000" y="0.5000"/>+ </polygon> <wire x1="-0.4256" y1="0.9350" x2="0.7100" y2="0.9350" width="0.1200" layer="21"/> <wire x1="0.7100" y1="-0.9350" x2="-0.7100" y2="-0.9350" width="0.1200" layer="21"/> <text x="0" y="1.535" size="1.27" layer="25" align="bottom-center">>NAME</text> <text x="0" y="-1.535" size="1.27" layer="27" align="top-center">>VALUE</text>-<!--adom-pin1--><polygon width="0.0500" layer="21"><vertex x="-0.7200" y="0.9400"/><vertex x="-0.8600" y="1.1300"/><vertex x="-0.5800" y="1.1300"/></polygon></package>+</package> </packages> <symbols> <symbol name="DMG1024UV-7">@@ -98,7 +110,13 @@ <connect gate="G$1" pin="G1" pad="5"/> <connect gate="G$1" pin="S1" pad="4"/> </connects>- <technologies><technology name=""/></technologies>+ <technologies>+ <technology name="">+ <attribute name="MPN" value="DMG1024UV-7" constant="no"/>+ <attribute name="MANUFACTURER" value="Diodes Incorporated" constant="no"/>+ <attribute name="LCSC_PN" value="C2759893" constant="no"/>+ </technology>+ </technologies> </device> </devices> </deviceset>
page.json+7−5@@ -26,7 +26,9 @@ "model_3d_step": "dmg1024uv-7.step", "lbr": "dmg1024uv-7.lbr" },- "distributor_links": {},+ "distributor_links": {+ "lcsc": "C2759893"+ }, "pins": [ { "number": "1",@@ -38,13 +40,13 @@ "number": "2", "name": "G2", "type": "input",- "description": "Gate of MOSFET 2. Logic-level control input; VGS(th) 0.5-1.0 V, VGSS absolute max ±6 V."+ "description": "Gate of MOSFET 2. Logic-level control input; VGS(th) 0.5-1.0 V, VGSS absolute max \u00b16 V." }, { "number": "3", "name": "D1", "type": "passive",- "description": "Drain of MOSFET 1. Switched terminal for the first N-channel FET; VDSS max 20 V, continuous ID 1.38 A at 25 °C."+ "description": "Drain of MOSFET 1. Switched terminal for the first N-channel FET; VDSS max 20 V, continuous ID 1.38 A at 25 \u00b0C." }, { "number": "4",@@ -56,13 +58,13 @@ "number": "5", "name": "G1", "type": "input",- "description": "Gate of MOSFET 1. Logic-level control input; VGS(th) 0.5-1.0 V, VGSS absolute max ±6 V."+ "description": "Gate of MOSFET 1. Logic-level control input; VGS(th) 0.5-1.0 V, VGSS absolute max \u00b16 V." }, { "number": "6", "name": "D2", "type": "passive",- "description": "Drain of MOSFET 2. Switched terminal for the second N-channel FET; VDSS max 20 V, continuous ID 1.38 A at 25 °C."+ "description": "Drain of MOSFET 2. Switched terminal for the second N-channel FET; VDSS max 20 V, continuous ID 1.38 A at 25 \u00b0C." } ], "provenance": {