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DMG1024UV-7

Public Made by Adom

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Diodes Incorporated Voltage Regulators - Linear, Low Drop Out (LDO) Regulators, SOT-563. Pinout extracted from the datasheet, KiCad symbol/footprint/3D.

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Contents

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DMG1024UV-7

Diodes Incorporated · Voltage Regulators - Linear, Low Drop Out (LDO) Regulators · SOT-563

DMG1024UV-7 from Diodes Incorporated, in a SOT-563. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 S2 passive Source of MOSFET 2. Return terminal for the second N-channel FET; internal source-drain body diode anode.
2 G2 input Gate of MOSFET 2. Logic-level control input; VGS(th) 0.5-1.0 V, VGSS absolute max ±6 V.
3 D1 passive Drain of MOSFET 1. Switched terminal for the first N-channel FET; VDSS max 20 V, continuous ID 1.38 A at 25 °C.
4 S1 passive Source of MOSFET 1. Return terminal for the first N-channel FET; internal source-drain body diode anode.
5 G1 input Gate of MOSFET 1. Logic-level control input; VGS(th) 0.5-1.0 V, VGSS absolute max ±6 V.
6 D2 passive Drain of MOSFET 2. Switched terminal for the second N-channel FET; VDSS max 20 V, continuous ID 1.38 A at 25 °C.

Key specifications

Parameter Value
Manufacturer Diodes Incorporated
Package SOT-563
Category PMIC
Pins 6

Ordering variants

Same part, different packaging or reel option.

  • DMG1024UV-7

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Drain-Source Breakdown Voltage BVDSS 20 V VGS = 0V, ID = 250μA 2
Gate Threshold Voltage VGS(th) 0.5 1 V VDS = VGS, ID = 250μA 2
Zero Gate Voltage Drain Current TJ = 25°C IDSS 100 nA VDS = 20V, VGS = 0V 2
Gate-Source Leakage IGSS -1 1 μA VGS = ±4.5V, VDS = 0V 2
Static Drain-Source On-Resistance RDS(ON) 0.3 0.45 Ω VGS = 4.5V, ID = 600mA 2
Static Drain-Source On-Resistance RDS(ON) 0.4 0.6 Ω VGS = 2.5V, ID = 500mA 2
Static Drain-Source On-Resistance RDS(ON) 0.5 0.75 Ω VGS = 1.8V, ID = 350mA 2
Diode Forward Voltage VSD 0.7 1.2 V VGS = 0V, IS = 150mA 2
Drain-Source Voltage VDSS 20 V 1
Gate-Source Voltage VGSS -6 6 V 1
Continuous Drain Current (Note 3), steady state ID 1.38 A Steady state, TA = 25°C 1
Continuous Drain Current (Note 3), steady state ID 0.89 A Steady state, TA = 85°C 1
Pulsed Drain Current (Note 4) IDM 3 A Repetitive rating, pulse width limited by junction temperature 1
Power Dissipation (Note 3) PD 530 mW Device mounted on FR-4 PCB, minimum recommended pad layout 1
Thermal Resistance, Junction to Ambient (Note 3) RθJA 235 °C/W @TA = 25°C 1
Operating and Storage Temperature Range TJ, TSTG -55 150 °C 1

CAD (KiCad official)

  • Symbol: DMG1024UV-7
  • Footprint: Package_TO_SOT_SMD:SOT-563
  • 3D model: SOT-563 (KiCad packages3D, STEP)
  • 3D model files: dmg1024uv-7-etched.step / dmg1024uv-7-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); dmg1024uv-7.step / dmg1024uv-7.glb are the bare package body.

3D model downloads

Two STEP files. Same geometry, different body top:

File Size Use it when
dmg1024uv-7.step 448 KB You want the bare part, or you mark your own boards.
dmg1024uv-7-etched.step 1.9 MB You want the part with DMG1024UV-7 already on it.

The marking in the etched file is real recessed geometry cut into the solid, not a texture or a decal: 411 faces against 54 in the bare model. It survives export, section views, and rendering in any CAD tool, and it drops straight into KiCad or Fusion with no extra setup.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Diodes Incorporated datasheet (6 pp, sha256 7a114e4a99c5b61a, retrieved 2026-08-17, tier: lcsc)
  • Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF