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DMC6040SSD-13

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Diodes Incorporated MOSFETs, SO-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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Ray dmc6040ssd-13: specified limits as data (metadata.characteristics, 44 rows from the datasheet) f7aba8d 17d ago

DMC6040SSD-13

Diodes Incorporated · MOSFETs · SO-8

DMC6040SSD-13 from Diodes Incorporated, in a SO-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 S1 passive Source of Q1 N-channel MOSFET (60V VDSS device).
2 G1 input Gate of Q1 N-channel MOSFET, rated for VGSS of ±20V.
3 S2 passive Source of Q2 P-channel MOSFET (-60V VDSS device).
4 G2 input Gate of Q2 P-channel MOSFET, rated for VGSS of ±20V.
5 D2 passive Drain of Q2 P-channel MOSFET, tied to pin 6 (-60V VDSS).
6 D2 passive Drain of Q2 P-channel MOSFET, tied to pin 5 (-60V VDSS).
7 D1 passive Drain of Q1 N-channel MOSFET, tied to pin 8 (60V VDSS).
8 D1 passive Drain of Q1 N-channel MOSFET, tied to pin 7 (60V VDSS).

Key specifications

Parameter Value
Manufacturer Diodes Incorporated
Package SO-8
Category Transistors/Thyristors
Pins 8

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Drain-Source Voltage (Q1 N-Channel) VDSS 60 V 2
Drain-Source Voltage (Q2 P-Channel) VDSS -60 V 2
Gate-Source Voltage (Q1 N-Channel) VGSS -20 20 V 2
Gate-Source Voltage (Q2 P-Channel) VGSS -20 20 V 2
Continuous Drain Current Q1, steady state, TA=+25°C ID 5.1 A VGS = -10V, steady state, TA = +25°C (Note 5) 2
Continuous Drain Current Q1, steady state, TA=+70°C ID 4.1 A VGS = -10V, steady state, TA = +70°C (Note 5) 2
Continuous Drain Current Q1, t<10s, TA=+25°C ID 6.5 A VGS = -10V, t < 10s, TA = +25°C (Note 5) 2
Continuous Drain Current Q1, t<10s, TA=+70°C ID 5.2 A VGS = -10V, t < 10s, TA = +70°C (Note 5) 2
Continuous Drain Current Q2, steady state, TA=+25°C ID -3.1 A VGS = -10V, steady state, TA = +25°C (Note 5) 2
Continuous Drain Current Q2, steady state, TA=+70°C ID -2.5 A VGS = -10V, steady state, TA = +70°C (Note 5) 2
Continuous Drain Current Q2, t<10s, TA=+25°C ID -3.9 A VGS = -10V, t < 10s, TA = +25°C (Note 5) 2
Continuous Drain Current Q2, t<10s, TA=+70°C ID -3.1 A VGS = -10V, t < 10s, TA = +70°C (Note 5) 2
Maximum Body Diode Forward Current (Q1) IS 2.1 A Note 5 2
Maximum Body Diode Forward Current (Q2) IS -2.1 A Note 5 2
Pulsed Drain Current (Q1) IDM 28 A 10µs pulse, duty cycle = 1% 2
Pulsed Drain Current (Q2) IDM -19 A 10µs pulse, duty cycle = 1% 2
Avalanche Current (Q1) IAS 17.2 A L = 0.1mH 2
Avalanche Current (Q2) IAS -17.6 A L = 0.1mH 2
Avalanche Energy (Q1) EAS 14.7 mJ L = 0.1mH 2
Avalanche Energy (Q2) EAS 15.4 mJ L = 0.1mH 2
Total Power Dissipation, TA=+25°C (Note 7) PD 1.24 W TA = +25°C, Note 7 2
Total Power Dissipation, TA=+70°C (Note 7) PD 0.8 W TA = +70°C, Note 7 2
Total Power Dissipation, TA=+25°C (Note 5) PD 1.56 W TA = +25°C, Note 5 2
Total Power Dissipation, TA=+70°C (Note 5) PD 1 W TA = +70°C, Note 5 2
Thermal Resistance, Junction to Ambient, steady state (Note 7) RθJA 101 °C/W Steady state, Note 7 2
Thermal Resistance, Junction to Ambient, t<10s (Note 7) RθJA 61 °C/W t < 10s, Note 7 2
Thermal Resistance, Junction to Ambient, steady state (Note 5) RθJA 80 °C/W Steady state, Note 5 2
Thermal Resistance, Junction to Ambient, t<10s (Note 5) RθJA 49 °C/W t < 10s, Note 5 2
Thermal Resistance, Junction to Case (Note 5) RθJC 14.7 °C/W Note 5 2
Operating and Storage Temperature Range TJ, TSTG -55 150 °C 2
Drain-Source Breakdown Voltage (Q1) BVDSS 60 V VGS = 0V, ID = 250µA 2
Drain-Source Breakdown Voltage (Q2) BVDSS -60 V VGS = 0V, ID = -250µA 5
Zero Gate Voltage Drain Current (Q1) IDSS 1 µA VDS = 48V, VGS = 0V 2
Zero Gate Voltage Drain Current (Q2) IDSS -1 µA VDS = -48V, VGS = 0V 5
Gate-Source Leakage (Q1) IGSS 100 nA VGS = ±20V, VDS = 0V 2
Gate-Source Leakage (Q2) IGSS 100 nA VGS = ±16V, VDS = 0V 5
Gate Threshold Voltage (Q1) VGS(TH) 1 3 V VDS = VGS, ID = 250µA 2
Gate Threshold Voltage (Q2) VGS(TH) -1 -3 V VDS = VGS, ID = -250µA 5
Static Drain-Source On-Resistance (Q1, VGS=10V) RDS(ON) 33 40 mΩ VGS = 10V, ID = 8A 2
Static Drain-Source On-Resistance (Q1, VGS=4.5V) RDS(ON) 37 55 mΩ VGS = 4.5V, ID = 5A 2
Static Drain-Source On-Resistance (Q2, VGS=-10V) RDS(ON) 86 110 mΩ VGS = -10V, ID = -4.5A 5
Static Drain-Source On-Resistance (Q2, VGS=-4.5V) RDS(ON) 98 130 mΩ VGS = -4.5V, ID = -3.5A 5
Diode Forward Voltage (Q1) VSD 0.7 1.2 V VGS = 0V, IS = 1A 2
Diode Forward Voltage (Q2) VSD -0.7 -1.2 V VGS = 0V, IS = -1A 5

CAD (KiCad official)

  • Symbol: DMC6040SSD-13
  • Footprint: Package_SO:SOIC-8_3.9x4.9mm_P1.27mm
  • 3D model: SO-8 (KiCad packages3D, STEP)
  • 3D model files: dmc6040ssd-13-etched.step / dmc6040ssd-13-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); dmc6040ssd-13.step / dmc6040ssd-13.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Diodes Incorporated datasheet (9 pp, sha256 9b44588d83a16d40, retrieved 2026-10-09, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (text+vision), consensus claude-opus-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF