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DMC3028LSDXQ-13

Public Made by Adom

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Diodes Incorporated MOSFETs, SO-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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3D Model

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Symbol & Footprint

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Datasheet

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Contents

README

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DMC3028LSDXQ-13

Diodes Incorporated · MOSFETs · SO-8

DMC3028LSDXQ-13 from Diodes Incorporated, in a SO-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 S1 passive Source of N-channel MOSFET Q1 (30V, 27mΩ max at VGS = 10V).
2 G1 input Gate of N-channel MOSFET Q1, with a VGS(th) of 1V to 3V and a VGSS rating of ±20V.
3 S2 passive Source of P-channel MOSFET Q2 (-30V, 25mΩ max at VGS = -10V).
4 G2 input Gate of P-channel MOSFET Q2, with a VGS(th) of -1V to -3V and a VGSS rating of ±20V.
5 D2 passive Drain of P-channel MOSFET Q2, with a continuous ID of -5.8A steady state at TA = +25°C; tied to pin 6.
6 D2 passive Drain of P-channel MOSFET Q2, with a continuous ID of -5.8A steady state at TA = +25°C; tied to pin 5.
7 D1 passive Drain of N-channel MOSFET Q1, with a continuous ID of 5.5A steady state at TA = +25°C; tied to pin 8.
8 D1 passive Drain of N-channel MOSFET Q1, with a continuous ID of 5.5A steady state at TA = +25°C; tied to pin 7.

Key specifications

Parameter Value
Manufacturer Diodes Incorporated
Package SO-8
Category Transistors/Thyristors
Pins 8

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Q1 Drain-Source Breakdown Voltage BVDSS 30 V VGS = 0V, ID = 250µA 2
Q1 Zero Gate Voltage Drain Current IDSS 1 µA VDS = 24V, VGS = 0V 2
Q1 Gate-Source Leakage IGSS 100 nA VGS = 20V, VDS = 0V 2
Q1 Gate Threshold Voltage VGS(th) 1 3 V VDS = VGS, ID = 250µA 2
Q1 Static Drain-Source On-Resistance RDS(ON) 19 27 mΩ VGS = 10V, ID = 6A 2
Q1 Static Drain-Source On-Resistance RDS(ON) 22 35 mΩ VGS = 4.5V, ID = 5A 2
Q1 Diode Forward Voltage VSD 0.7 1.2 V VGS = 0V, IS = 1.3A 2
Q2 Drain-Source Breakdown Voltage BVDSS -30 V VGS = 0V, ID = -250µA 3
Q2 Zero Gate Voltage Drain Current IDSS -1 µA VDS = -24V, VGS = 0V 3
Q2 Gate-Source Leakage IGSS 100 nA VGS = 20V, VDS = 0V 3
Q2 Gate Threshold Voltage VGS(th) -1 -3 V VDS = VGS, ID = -250µA 3
Q2 Static Drain-Source On-Resistance RDS(ON) 21 25 mΩ VGS = -10V, ID = -6A 3
Q2 Static Drain-Source On-Resistance RDS(ON) 29 41 mΩ VGS = -4.5V, ID = -5A 3
Q2 Diode Forward Voltage VSD -0.7 -1.2 V VGS = 0V, IS = -1.3A 3
Q1 Drain-Source Voltage VDSS 30 V TA = +25°C 2
Q2 Drain-Source Voltage VDSS -30 V TA = +25°C 2
Q1 Gate-Source Voltage VGSS 20 V ±20, TA = +25°C 2
Q2 Gate-Source Voltage VGSS 20 V ±20, TA = +25°C 2
Q1 Continuous Drain Current steady state ID 5.5 A VGS = 10V, TA = +25°C, Note 6 2
Q2 Continuous Drain Current steady state ID -5.8 A VGS = 10V, TA = +25°C, Note 6 2
Q1 Continuous Drain Current t<10s ID 7.2 A VGS = 10V, TA = +25°C, Note 6 2
Q2 Continuous Drain Current t<10s ID -7.6 A VGS = 10V, TA = +25°C, Note 6 2
Q1 Maximum Body Diode Forward Current IS 2.2 A Note 6 2
Q2 Maximum Body Diode Forward Current IS -2.2 A Note 6 2
Q1 Pulsed Drain Current IDM 40 A 10µs pulse, duty cycle = 1% 2
Q2 Pulsed Drain Current IDM -30 A 10µs pulse, duty cycle = 1% 2
Operating and Storage Temperature Range TJ, TSTG -55 150 °C 2
Total Power Dissipation PD 1.2 W TA = +25°C, Note 6 2
Total Power Dissipation PD 0.75 W TA = +70°C, Note 6 2
Total Power Dissipation PD 1.5 W TA = +25°C, Note 7 2
Total Power Dissipation PD 0.95 W TA = +70°C, Note 7 2
Thermal Resistance, Junction to Ambient RθJA 108 °C/W Steady State, Note 6 2
Thermal Resistance, Junction to Ambient RθJA 65 °C/W t<10s, Note 6 2
Thermal Resistance, Junction to Ambient RθJA 85 °C/W Steady State, Note 7 2
Thermal Resistance, Junction to Ambient RθJA 50 °C/W t<10s, Note 7 2
Thermal Resistance, Junction to Case RθJC 14.5 °C/W Note 7 2
Q1 Input Capacitance Ciss 641 pF VDS = 15V, VGS = 0V, f = 1.0MHz 2
Q1 Gate Resistance RG 2.2 Ω VDS = 0V, VGS = 0V, f = 1.0MHz 2
Q2 Input Capacitance Ciss 1241 pF VDS = -15V, VGS = 0V, f = 1.0MHz 3
Q2 Gate Resistance RG 14.8 Ω VDS = 0V, VGS = 0V, f = 1.0MHz 3

Materials and finish

As the datasheet states them (page.json metadata.appearance; the 3D model's colours follow it).

Part Material Colour / plating Datasheet says Page
contacts Copper tin  Terminal Connections: See Diagram  Terminals: Finish, Tin Finish Annealed over Copper Leadframe; 1

CAD (KiCad official)

  • Symbol: DMC3028LSDXQ-13
  • Footprint: Package_SO:SOIC-8_3.9x4.9mm_P1.27mm
  • 3D model: SO-8 (KiCad packages3D, STEP)
  • 3D model files: dmc3028lsdxq-13-etched.step / dmc3028lsdxq-13-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); dmc3028lsdxq-13.step / dmc3028lsdxq-13.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Diodes Incorporated datasheet (9 pp, sha256 8c33b3a5470c318e, retrieved 2026-10-23, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (text+vision), consensus claude-opus-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF