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DMC3028LSD-13

Diodes Incorporated · MOSFETs · SO-8

DMC3028LSD-13 from Diodes Incorporated, in a SO-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 S1 passive Source of Q1 N-channel MOSFET (V(BR)DSS 30V, ID 7.1A at TA = 25°C).
2 G1 input Gate of Q1 N-channel MOSFET, with maximum gate-source voltage of ±20V.
3 S2 passive Source of Q2 P-channel MOSFET (V(BR)DSS -30V, ID -7.4A at TA = 25°C).
4 G2 input Gate of Q2 P-channel MOSFET, with maximum gate-source voltage of ±20V.
5 D2 passive Drain of Q2 P-channel MOSFET, internally connected to pin 6 (drain-source voltage -30V max).
6 D2 passive Drain of Q2 P-channel MOSFET, internally connected to pin 5 (drain-source voltage -30V max).
7 D1 passive Drain of Q1 N-channel MOSFET, internally connected to pin 8 (drain-source voltage 30V max).
8 D1 passive Drain of Q1 N-channel MOSFET, internally connected to pin 7 (drain-source voltage 30V max).

Key specifications

Parameter Value
Manufacturer Diodes Incorporated
Package SO-8
Category Transistors/Thyristors
Pins 8

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Q1 N-Channel Drain-Source Breakdown Voltage BVDSS 30 V ID = 250μA, VGS= 0V 4
Q1 N-Channel Zero Gate Voltage Drain Current IDSS 0.5 μA VDS= 30V, VGS= 0V 4
Q1 N-Channel Gate-Source Leakage IGSS -100 100 nA VGS= ±20V, VDS= 0V 4
Q1 N-Channel Gate Threshold Voltage VGS(th) 1 3 V ID= 250μA, VDS= VGS 4
Q1 N-Channel Static Drain-Source On-Resistance RDS (ON) 0.028 Ω VGS= 10V, ID= 6.0A 4
Q1 N-Channel Static Drain-Source On-Resistance RDS (ON) 0.045 Ω VGS= 4.5V, ID= 4.9A 4
Q1 N-Channel Diode Forward Voltage VSD 0.68 1.2 V IS= 1.7A, VGS= 0V 4
Q2 P-Channel Drain-Source Breakdown Voltage BVDSS -30 V ID = -250μA, VGS= 0V 7
Q2 P-Channel Zero Gate Voltage Drain Current IDSS -0.5 μA VDS= -30V, VGS= 0V 7
Q2 P-Channel Gate-Source Leakage IGSS -100 100 nA VGS= ±20V, VDS= 0V 7
Q2 P-Channel Gate Threshold Voltage VGS(th) -1 -3 V ID= -250μA, VDS= VGS 7
Q2 P-Channel Static Drain-Source On-Resistance RDS (ON) 0.025 Ω VGS= -10V, ID= -7.1A 7
Q2 P-Channel Static Drain-Source On-Resistance RDS (ON) 0.041 Ω VGS= -4.5V, ID= -5.5A 7
Q2 P-Channel Diode Forward Voltage VSD -0.8 -1.2 V IS= -1.7A, VGS= 0V 7
Q1 N-Channel Drain-Source Voltage VDSS 30 V 2
Q2 P-Channel Drain-Source Voltage VDSS -30 V 2
Q1 N-Channel Gate-Source Voltage VGSS -20 20 V 2
Q2 P-Channel Gate-Source Voltage VGSS -20 20 V 2
Q1 N-Channel Continuous Drain Current ID 7.1 A VGS = 10V (Notes 3 & 5) 2
Q1 N-Channel Continuous Drain Current ID 5.7 A TA = 70°C (Notes 3 & 5) 2
Q1 N-Channel Continuous Drain Current ID 5.5 A (Notes 2 & 5) 2
Q1 N-Channel Continuous Drain Current ID 6.6 A (Notes 2 & 6) 2
Q2 P-Channel Continuous Drain Current ID -7.4 A VGS = 10V (Notes 3 & 5) 2
Q2 P-Channel Continuous Drain Current ID -5.9 A TA = 70°C (Notes 3 & 5) 2
Q2 P-Channel Continuous Drain Current ID -5.8 A (Notes 2 & 5) 2
Q2 P-Channel Continuous Drain Current ID -6.8 A (Notes 2 & 6) 2
Q1 N-Channel Pulsed Drain Current IDM 34 A VGS = 10V (Notes 4 & 5) 2
Q2 P-Channel Pulsed Drain Current IDM -36 A VGS = 10V (Notes 4 & 5) 2
Q1 N-Channel Continuous Source Current (Body diode) IS 3.5 A (Notes 3 & 5) 2
Q2 P-Channel Continuous Source Current (Body diode) IS -3.5 A (Notes 3 & 5) 2
Q1 N-Channel Pulsed Source Current (Body diode) ISM 34 A (Notes 4 & 5) 2
Q2 P-Channel Pulsed Source Current (Body diode) ISM -36 A (Notes 4 & 5) 2
Power Dissipation PD 1.3 W (Notes 2 & 5) 2
Power Dissipation PD 1.8 W (Notes 2 & 6) 2
Power Dissipation PD 2.1 W (Notes 3 & 5) 2
Operating and Storage Temperature Range TJ, TSTG -55 150 °C 2
Linear Derating Factor PD 10 mW/°C (Notes 2 & 5) 2
Linear Derating Factor PD 14 mW/°C (Notes 2 & 6) 2
Linear Derating Factor PD 17 mW/°C (Notes 3 & 5) 2
Thermal Resistance, Junction to Ambient RθJA 100 °C/W (Notes 2 & 5) 2
Thermal Resistance, Junction to Ambient RθJA 70 °C/W (Notes 2 & 6) 2
Thermal Resistance, Junction to Ambient RθJA 60 °C/W (Notes 3 & 5) 2
Q1 N-Channel Thermal Resistance, Junction to Lead RθJL 51 °C/W (Notes 5 & 7) 2
Q2 P-Channel Thermal Resistance, Junction to Lead RθJL 46 °C/W (Notes 5 & 7) 2

Materials and finish

As the datasheet states them (page.json metadata.appearance; the 3D model's colours follow it).

Part Material Colour / plating Datasheet says Page
contacts Copper tin • Terminals Connections: See Diagram • Terminals: Finish - Matte Tin annealed over Copper lead frame. 1

CAD (KiCad official)

  • Symbol: DMC3028LSD-13
  • Footprint: Package_SO:SOIC-8_3.9x4.9mm_P1.27mm
  • 3D model: SO-8 (KiCad packages3D, STEP)
  • 3D model files: dmc3028lsd-13-etched.step / dmc3028lsd-13-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); dmc3028lsd-13.step / dmc3028lsd-13.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Diodes Incorporated datasheet (11 pp, sha256 0534a48093d56e33, retrieved 2026-10-19, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (text+vision), consensus claude-opus-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF