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DMC2038LVTQ-7

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Diodes Incorporated MOSFETs, TSOT-23-6. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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DMC2038LVTQ-7

Diodes Incorporated · MOSFETs · TSOT-23-6

DMC2038LVTQ-7 from Diodes Incorporated, in a TSOT-23-6. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 D1 passive Drain of the N-channel MOSFET Q1, rated for a drain-source voltage (VDSS) of 20 V.
2 S1 passive Source of the N-channel MOSFET Q1; the device has a gate-source voltage (VGSS) rating of ±12 V.
3 D2 passive Drain of the P-channel MOSFET Q2, rated for a drain-source voltage (VDSS) of -20 V.
4 G2 input Gate of the P-channel MOSFET Q2; the device has a gate-source voltage (VGSS) rating of ±12 V.
5 S2 passive Source of the P-channel MOSFET Q2.
6 G1 input Gate of the N-channel MOSFET Q1; the device has a gate-source voltage (VGSS) rating of ±12 V.

Key specifications

Parameter Value
Manufacturer Diodes Incorporated
Package TSOT-23-6
Category Transistors/Thyristors
Pins 6

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Q1 N-ch Drain-Source Voltage VDSS 20 V @TA = +25°C 2
Q1 N-ch Gate-Source Voltage VGSS -12 12 V @TA = +25°C 2
Q1 N-ch Continuous Drain Current (Note 6), steady state, TA = +25°C ID 3.7 A Note 6; VGS = 4.5V; steady state; TA = +25°C 2
Q1 N-ch Continuous Drain Current (Note 6), steady state, TA = +70°C ID 3 A Note 6; VGS = 4.5V; steady state; TA = +70°C 2
Q1 N-ch Continuous Drain Current (Note 7), steady state, TA = +25°C ID 4.5 A Note 7; VGS = 4.5V; steady state; TA = +25°C 2
Q1 N-ch Continuous Drain Current (Note 7), steady state, TA = +70°C ID 3.6 A Note 7; VGS = 4.5V; steady state; TA = +70°C 2
Q1 N-ch Continuous Drain Current (Note 7), t<10s, TA = +25°C ID 5.2 A Note 7; VGS = 4.5V; t<10s; TA = +25°C 2
Q1 N-ch Continuous Drain Current (Note 7), t<10s, TA = +70°C ID 4.2 A Note 7; VGS = 4.5V; t<10s; TA = +70°C 2
Q1 N-ch Maximum Continuous Body Diode Forward Current (Note 7) IS 1.5 A Note 7 2
Q1 N-ch Pulsed Drain Current IDM 25 A 10µs pulse, duty cycle = 1% 2
Q2 P-ch Drain-Source Voltage VDSS -20 V @TA = +25°C 2
Q2 P-ch Gate-Source Voltage VGSS -12 12 V @TA = +25°C 2
Q2 P-ch Continuous Drain Current (Note 6), steady state, TA = +25°C ID -2.6 A Note 6; VGS = -4.5V; steady state; TA = +25°C 2
Q2 P-ch Continuous Drain Current (Note 6), steady state, TA = +70°C ID -2.1 A Note 6; VGS = -4.5V; steady state; TA = +70°C 2
Q2 P-ch Continuous Drain Current (Note 7), steady state, TA = +25°C ID -3.1 A Note 7; VGS = -4.5V; steady state; TA = +25°C 2
Q2 P-ch Continuous Drain Current (Note 7), steady state, TA = +70°C ID -2.5 A Note 7; VGS = -4.5V; steady state; TA = +70°C 2
Q2 P-ch Continuous Drain Current (Note 7), t<10s, TA = +25°C ID -3.8 A Note 7; VGS = -4.5V; t<10s; TA = +25°C 2
Q2 P-ch Continuous Drain Current (Note 7), t<10s, TA = +70°C ID -3 A Note 7; VGS = -4.5V; t<10s; TA = +70°C 2
Q2 P-ch Maximum Continuous Body Diode Forward Current (Note 7) IS -1.5 A Note 7 2
Q2 P-ch Pulsed Drain Current IDM -17 A 10µs pulse, duty cycle = 1% 2
Q1 N-ch Drain-Source Breakdown Voltage BVDSS 20 V VGS = 0V, ID = 250μA 3
Q1 N-ch Zero Gate Voltage Drain Current IDSS 1 μA @TC = +25°C; VDS = 16V, VGS = 0V 3
Q1 N-ch Gate-Source Leakage IGSS -100 100 nA VGS = ±12V, VDS = 0V 3
Q1 N-ch Gate Threshold Voltage VGS(TH) 0.4 1 V VDS = VGS, ID = 250μA 3
Q1 N-ch Static Drain-Source On-Resistance RDS(ON) 27 35 mΩ VGS = 4.5V, ID = 4.0A 3
Q1 N-ch Static Drain-Source On-Resistance RDS(ON) 33 43 mΩ VGS = 2.5V, ID = 2.5A 3
Q1 N-ch Static Drain-Source On-Resistance RDS(ON) 43 56 mΩ VGS = 1.8V, ID = 1.5A 3
Q1 N-ch Diode Forward Voltage VSD 0.4 1.1 V VGS = 0V, IS = 1A 3
Q1 N-ch Input Capacitance Ciss 400 530 pF VDS = 10V, VGS = 0V, f = 1.0MHz 3
Q1 N-ch Output Capacitance Coss 70 90 pF VDS = 10V, VGS = 0V, f = 1.0MHz 3
Q1 N-ch Reverse Transfer Capacitance Crss 65 100 pF VDS = 10V, VGS = 0V, f = 1.0MHz 3
Q1 N-ch Total Gate Charge (VGS = 10V) Qg 12 17 nC VGS = 10V; VDS = 15V, ID = 5.8A 3
Q1 N-ch Turn-On Delay Time tD(ON) 5 10 ns VDS = 10V, VGS = 4.5V, RG = 6Ω, IDS = 1A 3
Q1 N-ch Turn-On Rise Time tR 8 16 ns VDS = 10V, VGS = 4.5V, RG = 6Ω, IDS = 1A 3
Q1 N-ch Turn-Off Delay Time tD(OFF) 25 40 ns VDS = 10V, VGS = 4.5V, RG = 6Ω, IDS = 1A 3
Q1 N-ch Turn-Off Fall Time tF 8 16 ns VDS = 10V, VGS = 4.5V, RG = 6Ω, IDS = 1A 3
Q2 P-ch Drain-Source Breakdown Voltage BVDSS -20 V VGS = 0V, ID = -250μA 6
Q2 P-ch Zero Gate Voltage Drain Current IDSS -1 μA @TC = +25°C; VDS = -16V, VGS = 0V 6
Q2 P-ch Gate-Source Leakage IGSS -100 100 nA VGS = ±12V, VDS = 0V 6
Q2 P-ch Gate Threshold Voltage VGS(TH) -0.4 -1 V VDS = VGS, ID = -250μA 6
Q2 P-ch Static Drain-Source On-Resistance RDS(ON) 57 74 mΩ VGS = -4.5V, ID = -3.0A 6
Q2 P-ch Static Drain-Source On-Resistance RDS(ON) 76 110 mΩ VGS = -2.5V, ID = -1.5A 6
Q2 P-ch Static Drain-Source On-Resistance RDS(ON) 102 168 mΩ VGS = -1.8V, ID = -1.0A 6
Q2 P-ch Diode Forward Voltage VSD -0.8 -1 V VGS = 0V, IS = -0.6A 6
Q2 P-ch Input Capacitance Ciss 530 705 pF VDS = -10V, VGS = 0V, f = 1.0MHz 6
Q2 P-ch Output Capacitance Coss 70 95 pF VDS = -10V, VGS = 0V, f = 1.0MHz 6
Q2 P-ch Reverse Transfer Capacitance Crss 60 90 pF VDS = -10V, VGS = 0V, f = 1.0MHz 6
Q2 P-ch Total Gate Charge (VGS = -4.5V) Qg 7 10 nC VGS = -4.5V; VDS = -15V, ID = -6A 6
Q2 P-ch Turn-On Delay Time tD(ON) 11 20 ns VDS = -10V, VGS = -4.5V, RG = 6Ω, IS = -1A 6
Q2 P-ch Turn-On Rise Time tR 12 22 ns VDS = -10V, VGS = -4.5V, RG = 6Ω, IS = -1A 6
Q2 P-ch Turn-Off Delay Time tD(OFF) 21 34 ns VDS = -10V, VGS = -4.5V, RG = 6Ω, IS = -1A 6
Q2 P-ch Turn-Off Fall Time tF 13 23 ns VDS = -10V, VGS = -4.5V, RG = 6Ω, IS = -1A 6
Total Power Dissipation (Note 6), TA = +25°C PD 0.8 W Note 6 (minimum recommended pad layout); TA = +25°C 2
Thermal Resistance, Junction to Ambient (Note 6), steady state RθJA 168 °C/W Note 6; steady state 2
Thermal Resistance, Junction to Ambient (Note 6), t<10s RθJA 120 °C/W Note 6; t<10s 2
Total Power Dissipation (Note 7), TA = +25°C PD 1.1 W Note 7 (1 inch square copper plate); TA = +25°C 2
Thermal Resistance, Junction to Ambient (Note 7), steady state RθJA 114 °C/W Note 7; steady state 2
Thermal Resistance, Junction to Ambient (Note 7), t<10s RθJA 72 °C/W Note 7; t<10s 2
Thermal Resistance, Junction to Case (Note 7) RθJC 39 °C/W Note 7 2
Operating and Storage Temperature Range TJ, TSTG -55 150 °C 2

Materials and finish

As the datasheet states them (page.json metadata.appearance; the 3D model's colours follow it).

Part Material Colour / plating Datasheet says Page
contacts Copper tin • Terminals  Matte Tin Annealed over Copper Leadframe. 1

CAD (KiCad official)

  • Symbol: DMC2038LVTQ-7
  • Footprint: Package_TO_SOT_SMD:TSOT-23-6
  • 3D model: TSOT-23-6 (KiCad packages3D, STEP)
  • 3D model files: dmc2038lvtq-7-etched.step / dmc2038lvtq-7-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); dmc2038lvtq-7.step / dmc2038lvtq-7.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Diodes Incorporated datasheet (10 pp, sha256 f94e53961e1a70e9, retrieved 2026-10-19, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF