component
DMC2004DWK-7
Public Made by Adomby adom
Diodes Incorporated MOSFETs, SC-70-6(SOT-363). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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Contents
README
markdownDMC2004DWK-7
Diodes Incorporated · MOSFETs · SC-70-6(SOT-363)
DMC2004DWK-7 from Diodes Incorporated, in a SC-70-6(SOT-363). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | S1 | passive | Source of N-channel MOSFET Q1 (VDSS 20 V, ID 540 mA at TA = 25°C). |
| 2 | G1 | input | ESD-protected gate of N-channel Q1, VGSS ±8 V, VGS(th) 0.5 to 1.0 V. |
| 3 | D2 | passive | Drain of P-channel MOSFET Q2 (VDSS -20 V, ID -430 mA at TA = 25°C). |
| 4 | S2 | passive | Source of P-channel MOSFET Q2. |
| 5 | G2 | input | ESD-protected gate of P-channel Q2, VGSS ±8 V, VGS(th) -0.5 to -1.0 V. |
| 6 | D1 | passive | Drain of N-channel MOSFET Q1 (VDSS 20 V). |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Diodes Incorporated |
| Package | SC-70-6(SOT-363) |
| Category | Transistors/Thyristors |
| Pins | 6 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Drain-Source Breakdown Voltage (N-ch Q1) | BVDSS | 20 | V | VGS = 0V, ID = 10A | 2 | ||
| Zero Gate Voltage Drain Current (N-ch Q1) | IDSS | 1 | A | VDS = 16V, VGS = 0V | 2 | ||
| Gate-Source Leakage (N-ch Q1) | IGSS | 1 | A | VGS = ±4.5V, VDS = 0V | 2 | ||
| Gate Threshold Voltage (N-ch Q1) | VGS(th) | 0.5 | 1 | V | VDS = VGS, ID = 250A | 2 | |
| Static Drain-Source On-Resistance (N-ch Q1) | RDS(ON) | 0.4 | 0.55 | Ω | VGS = 4.5V, ID = 540mA | 2 | |
| Static Drain-Source On-Resistance (N-ch Q1) | RDS(ON) | 0.5 | 0.7 | Ω | VGS = 2.5V, ID = 500mA | 2 | |
| Static Drain-Source On-Resistance (N-ch Q1) | RDS(ON) | 0.7 | 0.9 | Ω | VGS = 1.8V, ID = 350mA | 2 | |
| Forward Transfer Admittance (N-ch Q1) | /Yfs/ | 200 | mS | VDS = 10V, ID = 0.2A | 2 | ||
| Diode Forward Voltage (N-ch Q1) | VSD | 0.5 | 1.2 | V | VGS = 0V, IS = 115mA | 2 | |
| Input Capacitance (N-ch Q1) | Ciss | 150 | pF | VDS = 16V, VGS = 0V, f = 1.0MHz | 2 | ||
| Output Capacitance (N-ch Q1) | Coss | 25 | pF | VDS = 16V, VGS = 0V, f = 1.0MHz | 2 | ||
| Reverse Transfer Capacitance (N-ch Q1) | Crss | 20 | pF | VDS = 16V, VGS = 0V, f = 1.0MHz | 2 | ||
| Drain-Source Breakdown Voltage (P-ch Q2) | BVDSS | -20 | V | VGS = 0V, ID = -250A | 2 | ||
| Zero Gate Voltage Drain Current (P-ch Q2) | IDSS | -1 | A | VDS = -20V, VGS = 0V | 2 | ||
| Gate-Source Leakage (P-ch Q2) | IGSS | 1 | A | VGS = ±4.5V, VDS = 0V | 2 | ||
| Gate Threshold Voltage (P-ch Q2) | VGS(th) | -0.5 | -1 | V | VDS = VGS, ID = -250A | 2 | |
| Static Drain-Source On-Resistance (P-ch Q2) | RDS(ON) | 0.7 | 0.9 | Ω | VGS = -4.5V, ID = -430mA | 2 | |
| Static Drain-Source On-Resistance (P-ch Q2) | RDS(ON) | 1.1 | 1.4 | Ω | VGS = -2.5V, ID = -300mA | 2 | |
| Static Drain-Source On-Resistance (P-ch Q2) | RDS(ON) | 1.7 | 2 | Ω | VGS = -1.8V, ID = -150mA | 2 | |
| Forward Transfer Admittance (P-ch Q2) | /Yfs/ | 200 | mS | VDS = 10V, ID = 0.2A | 2 | ||
| Diode Forward Voltage (P-ch Q2) | VSD | -0.5 | -1.2 | V | VGS = 0V, IS = -115mA | 2 | |
| Input Capacitance (P-ch Q2) | Ciss | 175 | pF | VDS = -16V, VGS = 0V, f = 1.0MHz | 2 | ||
| Output Capacitance (P-ch Q2) | Coss | 30 | pF | VDS = -16V, VGS = 0V, f = 1.0MHz | 2 | ||
| Reverse Transfer Capacitance (P-ch Q2) | Crss | 20 | pF | VDS = -16V, VGS = 0V, f = 1.0MHz | 2 | ||
| Drain Source Voltage (N-ch Q1) | VDSS | 20 | V | Maximum Ratings, TA = 25°C | 1 | ||
| Gate-Source Voltage (N-ch Q1) | VGSS | 8 | V | Maximum Ratings, TA = 25°C | 1 | ||
| Drain Current (N-ch Q1) | ID | 540 | mA | TA = 25°C (Note 1) | 1 | ||
| Drain Current (N-ch Q1) | ID | 390 | mA | TA = 85°C (Note 1) | 1 | ||
| Drain Source Voltage (P-ch Q2) | VDSS | -20 | V | Maximum Ratings, TA = 25°C | 1 | ||
| Gate-Source Voltage (P-ch Q2) | VGSS | 8 | V | Maximum Ratings, TA = 25°C | 1 | ||
| Drain Current (P-ch Q2) | ID | -430 | mA | TA = 25°C (Note 1) | 1 | ||
| Drain Current (P-ch Q2) | ID | -310 | mA | TA = 85°C (Note 1) | 1 | ||
| Power Dissipation | Pd | 250 | mW | Note 1 (device mounted on FR-4 PCB), TA = 25°C | 1 | ||
| Thermal Resistance, Junction to Ambient | RθJA | 500 | C/W | Note 1 | 1 | ||
| Operating and Storage Temperature Range | Tj, TSTG | -65 | 150 | C | 1 |
Materials and finish
As the datasheet states them (page.json metadata.appearance; the 3D model's colours follow it).
| Part | Material | Colour / plating | Datasheet says | Page |
|---|---|---|---|---|
| contacts | tin | Terminals: Solderable per MIL-STD-202, Method 208 Lead Free Plating (Matte Tin Finish annealed over Alloy 42 | 1 |
CAD (KiCad official)
- Symbol:
DMC2004DWK-7 - Footprint:
Package_TO_SOT_SMD:SOT-363_SC-70-6 - 3D model: SC-70-6(SOT-363) (KiCad packages3D, STEP)
- 3D model files:
dmc2004dwk-7-etched.step/dmc2004dwk-7-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);dmc2004dwk-7.step/dmc2004dwk-7.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Diodes Incorporated datasheet (8 pp, sha256
22ffa4482089204a, retrieved 2026-10-18, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-sonnet-5-5(text+vision), consensusclaude-opus-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).