component
DM9000AEP
Public Made by Adomby adom
DAVICOM Ethernet Controllers, LQFP-48(7x7). Pinout extracted from the datasheet, KiCad symbol/footprint/3D.
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page.json+362−8@@ -1,13 +1,372 @@ {+ "schema_version": 1,+ "type": "component", "slug": "dm9000aep",+ "title": "DM9000AEP",+ "brief": "DAVICOM Ethernet Controllers, LQFP-48(7x7). Datasheet-verified pinout, KiCad symbol/footprint/3D.", "version": "0.1.0",- "type": "component",- "description": "DAVICOM Ethernet Controllers, LQFP-48(7x7). Datasheet-verified pinout, KiCad symbol/footprint/3D.",+ "license": "CC-BY-SA-4.0", "tags": [ "component", "interface", "dm9000aep" ],+ "component": {+ "mpn": "DM9000AEP",+ "manufacturer": "DAVICOM",+ "package": "LQFP-48(7x7)",+ "pin_count": 48,+ "category": "Interface",+ "subcategory": "Ethernet Controllers",+ "datasheet": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8586171940096913408",+ "parts": {+ "symbol": "dm9000aep.kicad_sym",+ "footprint": "dm9000aep.kicad_mod",+ "model_3d": "dm9000aep.glb",+ "model_3d_step": "dm9000aep.step",+ "lbr": "dm9000aep.lbr"+ },+ "distributor_links": {},+ "pins": [+ {+ "number": "1",+ "name": "BGRES",+ "type": "bidirectional",+ "description": "Bandgap reference pin. Connect an external bias resistor (typically to BGGND) per the application circuit to set the internal bandgap current reference."+ },+ {+ "number": "2",+ "name": "RXVDD25",+ "type": "power_out",+ "description": "2.5V regulated power output for the TP receive analog block. Bypass to RXGND with a decoupling capacitor; not a supply input."+ },+ {+ "number": "3",+ "name": "RX+",+ "type": "bidirectional",+ "description": "Twisted-pair receive positive (10/100BASE-TX). Connect through the magnetics to the RJ45 receive pair; may swap with RX- in Auto-MDIX mode."+ },+ {+ "number": "4",+ "name": "RX-",+ "type": "bidirectional",+ "description": "Twisted-pair receive negative (10/100BASE-TX). Connect through the magnetics to the RJ45 receive pair; may swap with RX+ in Auto-MDIX mode."+ },+ {+ "number": "5",+ "name": "RXGND",+ "type": "power_in",+ "description": "Receive analog ground return for the twisted-pair receive block."+ },+ {+ "number": "6",+ "name": "TXGND",+ "type": "power_in",+ "description": "Transmit analog ground return for the twisted-pair transmit block."+ },+ {+ "number": "7",+ "name": "TX+",+ "type": "bidirectional",+ "description": "Twisted-pair transmit positive (10/100BASE-TX). Drives the RJ45 transmit pair through the magnetics; may swap with TX- in Auto-MDIX mode."+ },+ {+ "number": "8",+ "name": "TX-",+ "type": "bidirectional",+ "description": "Twisted-pair transmit negative (10/100BASE-TX). Drives the RJ45 transmit pair through the magnetics; may swap with TX+ in Auto-MDIX mode."+ },+ {+ "number": "9",+ "name": "TXVDD25",+ "type": "power_out",+ "description": "2.5V regulated power output for the TP transmit analog block. Bypass to TXGND with a decoupling capacitor; not a supply input."+ },+ {+ "number": "10",+ "name": "SD7",+ "type": "bidirectional",+ "description": "Processor data bus bit 7 (host interface). 8mA I/O with internal pull-down; drive strength selectable via BUSCR (reg 38H)."+ },+ {+ "number": "11",+ "name": "SD6",+ "type": "bidirectional",+ "description": "Processor data bus bit 6 (host interface). 8mA I/O with internal pull-down."+ },+ {+ "number": "12",+ "name": "SD5",+ "type": "bidirectional",+ "description": "Processor data bus bit 5 (host interface). 8mA I/O with internal pull-down."+ },+ {+ "number": "13",+ "name": "SD4",+ "type": "bidirectional",+ "description": "Processor data bus bit 4 (host interface). 8mA I/O with internal pull-down."+ },+ {+ "number": "14",+ "name": "SD3",+ "type": "bidirectional",+ "description": "Processor data bus bit 3 (host interface). 8mA I/O with internal pull-down."+ },+ {+ "number": "15",+ "name": "GND",+ "type": "power_in",+ "description": "Digital ground return."+ },+ {+ "number": "16",+ "name": "SD2",+ "type": "bidirectional",+ "description": "Processor data bus bit 2 (host interface). 8mA I/O with internal pull-down."+ },+ {+ "number": "17",+ "name": "SD1",+ "type": "bidirectional",+ "description": "Processor data bus bit 1 (host interface). 8mA I/O with internal pull-down."+ },+ {+ "number": "18",+ "name": "SD0",+ "type": "bidirectional",+ "description": "Processor data bus bit 0 (host interface). 8mA I/O with internal pull-down."+ },+ {+ "number": "19",+ "name": "EEDIO",+ "type": "bidirectional",+ "description": "Serial EEPROM data I/O (Microwire 93C46-style). 8mA I/O with internal pull-down; used to auto-load MAC, vendor/product ID, and pin polarity config."+ },+ {+ "number": "20",+ "name": "EECK",+ "type": "output",+ "description": "Serial EEPROM clock output. Also a strap pin at power-up: pulled high selects INT active-low, floating (default) selects INT active-high."+ },+ {+ "number": "21",+ "name": "EECS",+ "type": "output",+ "description": "Serial EEPROM chip select output. Also a strap pin at power-up: pulled high selects 8-bit host data bus, floating (default) selects 16-bit."+ },+ {+ "number": "22",+ "name": "SD15/WAKE",+ "type": "bidirectional",+ "description": "Dual-function pin. In 16-bit host mode this is processor data bus bit 15 (I/O, 8mA). In 8-bit host mode (EECS strapped high) it is WAKE, an output that asserts on a wake-up event; it is also strap-sampled at power-up to select CS# polarity (pulled high = CS# active high, floating = CS# active low)."+ },+ {+ "number": "23",+ "name": "VDD",+ "type": "power_in",+ "description": "Digital 3.3V supply input. Bypass locally with a decoupling capacitor."+ },+ {+ "number": "24",+ "name": "SD14/LED3",+ "type": "bidirectional",+ "description": "Dual-function pin. In 16-bit host mode this is processor data bus bit 14 (I/O, 8mA). In 8-bit host mode it is LED3, a 16mA open-drain-style output that drives the full-duplex or 10M indicator LED per the EEPROM-selected LED mode."+ },+ {+ "number": "25",+ "name": "SD13/GP6",+ "type": "bidirectional",+ "description": "Dual-function pin. In 16-bit host mode this is processor data bus bit 13 (I/O, 8mA). In 8-bit host mode it is GP6, a general-purpose output (8mA) controlled by register 1Fh; also strap-sampled at power-up to select INT output type (pulled high = open-drain, floating = force/push-pull)."+ },+ {+ "number": "26",+ "name": "SD12/GP5",+ "type": "bidirectional",+ "description": "Dual-function pin. In 16-bit host mode this is processor data bus bit 12 (I/O, 8mA). In 8-bit host mode it is GP5, a general-purpose output (8mA) driven from register 1Fh."+ },+ {+ "number": "27",+ "name": "SD11/GP4",+ "type": "bidirectional",+ "description": "Dual-function pin. In 16-bit host mode this is processor data bus bit 11 (I/O, 8mA). In 8-bit host mode it is GP4, a general-purpose output (8mA) driven from register 1Fh."+ },+ {+ "number": "28",+ "name": "SD10/GP3",+ "type": "bidirectional",+ "description": "Dual-function pin. In 16-bit host mode this is processor data bus bit 10 (I/O, 8mA). In 8-bit host mode it is GP3, a general-purpose I/O (8mA, default input) programmed via the GPCR (1Eh) and GPR (1Fh) registers."+ },+ {+ "number": "29",+ "name": "SD9/GP2",+ "type": "bidirectional",+ "description": "Dual-function pin. In 16-bit host mode this is processor data bus bit 9 (I/O, 8mA). In 8-bit host mode it is GP2, a general-purpose I/O (8mA, default input) programmed via GPCR and GPR."+ },+ {+ "number": "30",+ "name": "VDD",+ "type": "power_in",+ "description": "Digital 3.3V supply input. Bypass locally with a decoupling capacitor."+ },+ {+ "number": "31",+ "name": "SD8/GP1",+ "type": "bidirectional",+ "description": "Dual-function pin. In 16-bit host mode this is processor data bus bit 8 (I/O, 8mA). In 8-bit host mode it is GP1, a general-purpose I/O (8mA, default input) programmed via GPCR and GPR."+ },+ {+ "number": "32",+ "name": "CMD",+ "type": "input",+ "description": "Command-type / address-strobe input for the host bus. High = the current cycle accesses the DATA port; low = the current cycle accesses the INDEX (address) port. Internal pull-down."+ },+ {+ "number": "33",+ "name": "GND",+ "type": "power_in",+ "description": "Digital ground return."+ },+ {+ "number": "34",+ "name": "INT",+ "type": "output",+ "description": "Interrupt request to host. 8mA output, active-high by default; polarity is programmable via EEPROM or the EECK strap pin, and output type (push-pull vs open-drain) is set in 8-bit mode by the GP6 strap."+ },+ {+ "number": "35",+ "name": "IOR#",+ "type": "input",+ "description": "Processor read strobe. Active-low by default; polarity is programmable via EEPROM. Internal pull-down."+ },+ {+ "number": "36",+ "name": "IOW#",+ "type": "input",+ "description": "Processor write strobe. Active-low by default; polarity is programmable via EEPROM. Internal pull-down."+ },+ {+ "number": "37",+ "name": "CS#",+ "type": "input",+ "description": "Chip select. Active-low by default; polarity is programmable via EEPROM (and by the WAKE strap pin in 8-bit mode). Internal pull-down."+ },+ {+ "number": "38",+ "name": "LED2",+ "type": "output",+ "description": "Link/Activity LED driver, 16mA. LED mode 1 = combined link + carrier-sense of the internal PHY; LED mode 0 = carrier-sense only. In 16-bit mode this pin can alternately be strapped as ISA IOWAIT or WAKE per EEPROM."+ },+ {+ "number": "39",+ "name": "LED1",+ "type": "output",+ "description": "Speed LED driver, 16mA. Low = internal PHY operating at 100 Mbps; floating = 10 Mbps. In 16-bit mode this pin can alternately act as ISA bus IO16 per EEPROM setting."+ },+ {+ "number": "40",+ "name": "PWRST#",+ "type": "input",+ "description": "Active-low power-on reset. The DM9000A is ready 5 us after this pin is deasserted."+ },+ {+ "number": "41",+ "name": "TEST",+ "type": "input",+ "description": "Operation-mode / test-mode select. Tie to ground for normal application; factory test use only."+ },+ {+ "number": "42",+ "name": "VDD",+ "type": "power_in",+ "description": "Digital 3.3V supply input. Bypass locally with a decoupling capacitor."+ },+ {+ "number": "43",+ "name": "X2",+ "type": "output",+ "description": "25 MHz crystal oscillator output. Connect to the far side of the parallel-resonant 25 MHz crystal (with its loading capacitors), or leave floating if X1 is driven by an external clock."+ },+ {+ "number": "44",+ "name": "X1",+ "type": "input",+ "description": "25 MHz crystal oscillator input, or single-ended clock input from an external 25 MHz source."+ },+ {+ "number": "45",+ "name": "GND",+ "type": "power_in",+ "description": "Digital ground return."+ },+ {+ "number": "46",+ "name": "SD",+ "type": "input",+ "description": "Fiber-optic Signal Detect input (PECL). Indicates whether the fiber receive pair is seeing a valid signal; used only in the optional 100M fiber interface mode."+ },+ {+ "number": "47",+ "name": "RXGND",+ "type": "power_in",+ "description": "Second receive analog ground return; tie together with pin 5 (RXGND) at the analog ground."+ },+ {+ "number": "48",+ "name": "BGGND",+ "type": "power_in",+ "description": "Bandgap analog ground return for the BGRES reference."+ }+ ],+ "provenance": {+ "extractor": "ds2sf",+ "datasheet": {+ "url": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8586171940096913408",+ "pages": 60,+ "sha256": "ddbd914643835170",+ "source_tier": "lcsc"+ },+ "cad": "KiCad official (CC-BY-SA 4.0)",+ "pins": {+ "total": 48,+ "described": 48,+ "cites_pages": true,+ "refuses_to_fabricate": true+ }+ },+ "viewers": {+ "symbol": "viewers/symbol.html",+ "footprint": "viewers/footprint.html"+ }+ },+ "metadata": {+ "specs": {+ "Manufacturer": "DAVICOM",+ "Package": "LQFP-48(7x7)",+ "Category": "Interface",+ "Pins": "48"+ }+ },+ "variants": [+ {+ "mpn": "DM9000AEP",+ "kind": "packaging"+ }+ ],+ "sections": [+ "hero",+ "viewers",+ "readme",+ "breadcrumbs",+ "info"+ ],+ "discovery_triggers": [+ "dm9000aep"+ ],+ "discovery_pitch": "DM9000AEP (DAVICOM) component page with datasheet-verified CAD.",+ "author": {+ "name": "Ray",+ "email": "[email protected]"+ }, "dependencies": {}, "hero": { "type": "image",@@ -25,10 +384,5 @@ "docs/dm9000aep-datasheet.pdf", "viewers/symbol.html", "viewers/footprint.html"- ],- "visibility": "public",- "author": {- "name": "Ray",- "email": "[email protected]"- }+ ] }