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DM8203IEP

Public Made by Adom

by adom

DAVICOM Ethernet Controllers, LQFP-64(10x10). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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DM8203IEP

DAVICOM · Ethernet Controllers · LQFP-64(10x10)

DM8203IEP from DAVICOM, in a LQFP-64(10x10). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 DVDD33 power_in Digital 3.3V power supply.
2 PHY_MDC output MII serial management data clock (internal pull-down); not used in Reverse MII mode.
3 PHY_MDIO bidirectional MII serial management data; not used in Reverse MII mode.
4 DGND power_in Digital ground.
5 P2_TXD3 output Port 2 MII/RevMII transmit data bit 3 (internal pull-down, not used in RMII); strap with P2_TXD2 selects P2 mode (00 MII, 01 Reverse MII, 10 RMII, 11 LFP enabled/MII).
6 P2_TXD2 output Port 2 MII/RevMII transmit data bit 2 (internal pull-down, not used in RMII); strap with P2_TXD3 selects P2 mode.
7 P2_TXD1 output Port 2 MII/RMII/RevMII transmit data bit 1 (internal pull-down).
8 DGND power_in Digital ground.
9 P2_TXD0 output Port 2 MII/RMII/RevMII transmit data bit 0 (internal pull-down).
10 P2_TXE output Port 2 transmit enable (internal pull-down); strap at reset: 0 = port 2 normal mode, 1 = port 2 force mode.
11 DVDD18 power_in Digital 1.8V power supply.
12 P2_TXC bidirectional Port 2 MII transmit clock (input in MII); 50MHz clock output in RMII; transmit clock output in Reverse MII.
13 DVDD33 power_in Digital 3.3V power supply.
14 P2_TXER output Port 2 MII/RevMII transmit error (not used in RMII); strap at reset: 0 = port 1 TP mode, 1 = port 1 fiber mode.
15 P2_CRS bidirectional Port 2 MII carrier sense (input); RMII CRS_DV input; output in Reverse MII.
17 P2_COL bidirectional Port 2 MII collision detect (input); not used in RMII (tie to ground); output in Reverse MII.
16 DGND power_in Digital ground.
18 P2_RXER input Port 2 MII/RevMII receive error; not used in RMII, tie to ground.
19 P2_RXC input Port 2 MII/RevMII receive clock; 50MHz reference clock input in RMII.
20 P2_RXDV input Port 2 MII/RevMII receive data valid; not used in RMII, tie to ground.
21 P2_RXD3 input Port 2 MII/RevMII receive data bit 3; not used in RMII, tie to ground.
22 P2_RXD2 input Port 2 MII/RevMII receive data bit 2; not used in RMII, tie to ground.
23 DGND power_in Digital ground.
24 P2_RXD1 input Port 2 MII/RMII/RevMII receive data bit 1.
25 P2_RXD0 input Port 2 MII/RMII/RevMII receive data bit 0.
26 DVDD33 power_in Digital 3.3V power supply.
27 EEDIO bidirectional EEPROM data in/out.
28 EECK output EEPROM serial clock (internal pull-down); strap at reset: 0 = port 2 forced 10 Mbps, 1 = forced 100 Mbps.
29 EECS output EEPROM chip select (internal pull-down); strap at reset: 0 = port 0 TP mode, 1 = port 0 fiber mode.
30 PWRST# input Active-low power-on reset, minimum 1ms low.
31 DGND power_in Digital ground.
32 TEST1 input Test pin 1 (internal pull-down); tie to DVDD33 in application.
33 AVDD18 power_in Analog 1.8V power supply.
34 P1_TX+ bidirectional Port 1 twisted-pair TX+; transmit in MDI mode or receive in MDIX mode.
35 P1_TX- bidirectional Port 1 twisted-pair TX-; transmit in MDI mode or receive in MDIX mode.
36 AGND power_in Analog ground.
37 P1_RX+ bidirectional Port 1 twisted-pair RX+; receive in MDI mode or transmit in MDIX mode.
38 P1_RX- bidirectional Port 1 twisted-pair RX-; receive in MDI mode or transmit in MDIX mode.
39 AVDD33 power_in Analog 3.3V power supply.
40 AVDD18 power_in Analog 1.8V power supply.
41 P0_TX+ bidirectional Port 0 twisted-pair TX+; transmit in MDI mode or receive in MDIX mode.
42 P0_TX- bidirectional Port 0 twisted-pair TX-; transmit in MDI mode or receive in MDIX mode.
43 AGND power_in Analog ground.
44 P0_RX+ bidirectional Port 0 twisted-pair RX+; receive in MDI mode or transmit in MDIX mode.
45 P0_RX- bidirectional Port 0 twisted-pair RX-; receive in MDI mode or transmit in MDIX mode.
46 AVDD33 power_in Analog 3.3V power supply.
47 BGRES bidirectional Band-gap pin; connect a 6.8K ohm ±1% resistor to BGGND.
48 BGGND power_in Band-gap ground.
49 VCNTL bidirectional 1.8V voltage control.
50 VREF power_in Voltage reference; connect a 0.1uF capacitor to ground.
51 AVDD33 power_in Analog 3.3V power supply.
52 X1 input Crystal or oscillator 25MHz input.
53 X2 output Crystal 25MHz output.
54 AGND power_in Analog ground.
55 P1_LNK_LED output Port 1 link/active LED, combined link and carrier sense of internal PHY1.
56 P1_SPD_LED output Port 1 speed LED; low indicates 100M, floating for 10M mode of PHY1.
57 P0_LNK_LED output Port 0 link/active LED, combined link and carrier sense of internal PHY0.
58 P0_SPD_LED output Port 0 speed LED; low indicates 100M, floating for 10M mode of PHY0.
59 TEST2 input Test pin 2 (internal pull-down); tie to DVDD33 in application.
60 SMI_MDC input Serial data management interface clock.
61 DVDD18 power_in Digital 1.8V power supply.
62 SMI_MDIO bidirectional Serial data management interface data in/out.
63 TEST3 input Test pin 3 (internal pull-down); tie to DVDD33 in application.
64 DGND power_in Digital ground.

Key specifications

Parameter Value
Manufacturer DAVICOM
Package LQFP-64(10x10)
Category Interface
Pins 64

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Digital 3.3V Power DVDD33 -0.3 3.6 V 77
Digital 1.8V Power DVDD18 -0.3 1.95 V 77
Analog 3.3V Power AVDD33 -0.3 3.6 V 77
Analog 1.8V Power AVDD18 -0.3 1.95 V 77
Input/Output Voltage IOV -0.5 5.5 V 77
Storage Temperature Range TSTG -65 150 °C 77
Ambient Temperature TA -40 85 °C For DM8203I 77
Lead Temperature LT 260 °C TL, soldering, 10 sec. 77
Digital 3.3V Power DVDD33 3.135 3.465 V 77
Digital 1.8V Power DVDD18 1.71 1.89 V 77
Analog 3.3V Power AVDD33 3.135 3.465 V 77
Analog 1.8V Power AVDD18 1.71 1.89 V 77
Input Low Voltage VIL 0.8 V Vcond1 78
Input High Voltage VIH 2 V Vcond1 78
Input Low Leakage Current IIL -1 uA VIN = 0.0V, Vcond1 78
Input High Leakage Current IIH 1 uA VIN = 3.3V, Vcond1 78
Output Low Voltage VOL 0.4 V IOL = 4mA 78
Output High Voltage VOH 2.4 V IOH = -4mA 78
100TX+/- Differential Output Voltage VTD100 1.9 2 2.1 V Peak to Peak 78
10TX+/- Differential Output Voltage VTD10 4.4 5 5.6 V Peak to Peak 78
100TX+/- Differential Output Current ITD100 19 20 21 mA Absolute Value 78
10TX+/- Differential Output Current ITD10 44 50 56 mA Absolute Value 78
PWRST# Low Period T1 1 ms 79
Strap pin hold time with PWRST# T2 40 ns 79
PWRST# high to EECS burst end T4 4 ms 79
P2_TXE,P2_TXD3~0 to P2_TXC Rising Output Delay T2 8 ns 80
P2_RXER, P2_RXDV and P2_RXD3~0 to P2_RXC Setup Time T2 5 ns 80
P2_RXER, P2_RXDV and P2_RXD3~0 to P2_RXC Hold Time T3 5 ns 80
RX+/RX- Common Mode Input Voltage VICM 1.8 V 100 W Termination Across 78
Power Dissipation 100BASE-TX PD 107 mA 1.8V only 77
Power Dissipation 100BASE-TX PD 54 mA 3.3V only 77
Power Dissipation 10BASE-TX PD 57 mA TX idle, 1.8V only 77
Power Dissipation 10BASE-TX PD 64 mA 100% utilization, 1.8V only 77
Power Dissipation 10BASE-TX PD 11 mA 3.3V only 77

CAD (KiCad official)

  • Symbol: DM8203IEP
  • Footprint: Package_QFP:LQFP-64_10x10mm_P0.5mm
  • 3D model: LQFP-64(10x10) (KiCad packages3D, STEP)
  • 3D model files: dm8203iep-etched.step / dm8203iep-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); dm8203iep.step / dm8203iep.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: DAVICOM datasheet (87 pp, sha256 f1a7da6674d919be, retrieved 2026-10-24, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF