component
DLP05LC-7-F
Public Made by Adomby adom
Diodes Incorporated TVS, SOT-23. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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Contents
README
markdownDLP05LC-7-F
Diodes Incorporated · TVS · SOT-23
DLP05LC-7-F from Diodes Incorporated, in a SOT-23. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model). Symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | G | power_in | Ground pin of the unidirectional TVS, shown at the bottom left of the device schematic. |
| 2 | NC | unconnected | No connection, shown at the bottom right of the device schematic. |
| 3 | LINE TO BE PROTECTED | passive | Protected data, signal or VCC line; the TVS clamps it to ground, with 5V reverse standoff voltage and 6.0V minimum breakdown at 1.0mA. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Diodes Incorporated |
| Package | SOT-23 |
| Category | Circuit Protection |
| Pins | 3 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Peak Pulse Power | Ppk | 300 | W | tp = 8x20µs | 2 | ||
| Breakdown Voltage | VBR | 6 | V | IT = 1.0 mA | 2 | ||
| Max. Reverse Leakage Current | IR | 20 | µA | @ VRWM = 5 V | 2 | ||
| Max. Clamping Voltage | VC | 11 | V | @ Ipp = 1 A (8x20µs waveform, Note 8) | 2 | ||
| Operating and Storage Temperature Range | TJ, TSTG | -55 | 150 | °C | 2 | ||
| Typical Thermal Resistance, Junction to Ambient | RθJA | 408 | °C/W | Note 5: FR-4 PCB pad layout, 2oz Cu traces, pad 1in x 1in | 2 |
Materials and finish
As the datasheet states them (page.json metadata.appearance; the 3D model's colours follow it).
| Part | Material | Colour / plating | Datasheet says | Page |
|---|---|---|---|---|
| contacts | tin | • Terminals: Finish, Matte Tin Plated Leads, Solderable per MIL-STD-202, Method 208 | 1 |
CAD (KiCad official)
- Symbol:
DLP05LC-7-F - Footprint:
Package_TO_SOT_SMD:SOT-23 - 3D model: SOT-23, generated from the KiCad footprint (body from the F.Fab outline, terminals on the pads, 1.025 mm tall, datasheet A, nominal). Neither the vendor nor KiCad ships a 3D model for this package, so the dimensions come from the datasheet drawing where it was read and are defaults otherwise (see provenance.model_3d_generated), not the manufacturer's CAD (STEP)
- 3D model files:
dlp05lc-7-f-etched.step/dlp05lc-7-f-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);dlp05lc-7-f.step/dlp05lc-7-f.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Diodes Incorporated datasheet (5 pp, sha256
4cc9fdd38cbe9e0b, retrieved 2026-11-12, tier: manufacturer) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-sonnet-5-5(text+vision), consensusclaude-opus-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).