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Contents

README

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DIX9211PTR

Texas Instruments · Audio Interface ICs · LQFP-48(7x7)

DIX9211PTR from Texas Instruments, in a LQFP-48(7x7). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 ERROR/INT0 output DIR error detection output or Interrupt0 output, selectable by ERRSEL register.
2 NPCM/INT1 output DIR non-PCM detection output or Interrupt1 output, selectable by NPCMSEL register.
3 MPIO_A0 bidirectional Multipurpose I/O pin Group A with 5-V tolerant Schmitt trigger input.
4 MPIO_A1 bidirectional Multipurpose I/O pin Group A with 5-V tolerant Schmitt trigger input.
5 MPIO_A2 bidirectional Multipurpose I/O pin Group A with 5-V tolerant Schmitt trigger input.
6 MPIO_A3 bidirectional Multipurpose I/O pin Group A with 5-V tolerant Schmitt trigger input.
7 MPIO_C0 bidirectional Multipurpose I/O pin Group C with 5-V tolerant Schmitt trigger input.
8 MPIO_C1 bidirectional Multipurpose I/O pin Group C with 5-V tolerant Schmitt trigger input.
9 MPIO_C2 bidirectional Multipurpose I/O pin Group C with 5-V tolerant Schmitt trigger input.
10 MPIO_C3 bidirectional Multipurpose I/O pin Group C with 5-V tolerant Schmitt trigger input.
11 MPIO_B0 bidirectional Multipurpose I/O pin Group B with 5-V tolerant Schmitt trigger input.
12 MPIO_B1 bidirectional Multipurpose I/O pin Group B with 5-V tolerant Schmitt trigger input.
13 MPIO_B2 bidirectional Multipurpose I/O pin Group B with 5-V tolerant Schmitt trigger input.
14 MPIO_B3 bidirectional Multipurpose I/O pin Group B with 5-V tolerant Schmitt trigger input.
15 MPO0 output Multipurpose output 0, configurable output for DIR flags, TXOUT, RECOUT, LOCK, XMCKO, or GPIO.
16 MPO1 output Multipurpose output 1, configurable output for VOUT, DIR flags, TXOUT, RECOUT, LOCK, XMCKO, or GPIO.
17 DOUT output Main output port serial digital audio data output.
18 LRCK output Main output port LR clock output.
19 BCK output Main output port Bit clock output.
20 SCKO output Main output port System clock output with 10 pF maximum load capacitance.
21 DGND power_in Ground connection for digital circuits.
22 DVDD power_in Digital power supply 3.3 V typical (2.9 V to 3.6 V operating range).
23 MDO/ADR0 bidirectional SPI data output or I2C slave address setting 0 with Schmitt trigger input.
24 MDI/SDA bidirectional SPI data input or I2C serial data line (open-drain in I2C mode) with Schmitt trigger input.
25 MC/SCL input SPI clock input or I2C serial clock line with Schmitt trigger input.
26 MS/ADR1 input SPI chip select or I2C slave address setting 1 with Schmitt trigger input.
27 MODE input Control mode setting pin sampled at power-on or external reset; tie to VDD for SPI mode or DGND for I2C mode.
28 RXIN7/ADIN0 input Biphase signal input 7 or AUXIN0 serial audio data with 5-V tolerant Schmitt trigger input.
29 RXIN6/ALRCKI0 input Biphase signal input 6 or AUXIN0 LR clock input with 5-V tolerant Schmitt trigger input.
30 RXIN5/ABCKI0 input Biphase signal input 5 or AUXIN0 bit clock input with 5-V tolerant Schmitt trigger input.
31 RXIN4/ASCKI0 input Biphase signal input 4 or AUXIN0 system clock input with 5-V tolerant Schmitt trigger input.
32 RXIN3 input Biphase signal input 3 with 5-V tolerant Schmitt trigger input.
33 RXIN2 input Biphase signal input 2 with 5-V tolerant Schmitt trigger input.
34 RST input Reset input active low with 50 kΩ typical internal pull-down resistor and Schmitt trigger input.
35 RXIN1 input Biphase signal input 1 with built-in coaxial amplifier and 5-V tolerant input.
36 VDDRX power_in Power supply for RXIN0 and RXIN1 coaxial amplifiers 3.3 V typical (2.9 V to 3.6 V operating range).
37 RXIN0 input Biphase signal input 0 with built-in coaxial amplifier (0.2 Vpp input specification for coaxial, 5-V tolerant).
38 GNDRX power_in Ground connection for RXIN0 and RXIN1 power supply.
39 XTI input Oscillation circuit input for 24.576 MHz crystal resonator or external clock source with CMOS Schmitt trigger input.
40 XTO output Oscillation circuit output for crystal resonator connection.
41 AGND power_in Ground connection for analog PLL circuit.
42 VCC power_in Analog power supply for PLL circuit 3.3 V typical (2.9 V to 3.6 V operating range).
43 FILT output External PLL loop filter connection terminal; must connect recommended filter per datasheet.
44 RSV2 unconnected Reserved pin, leave open.
45 RSV1 unconnected Reserved pin, connect to ground.
46 RSV1 unconnected Reserved pin, connect to ground.
47 RSV2 unconnected Reserved pin, leave open.
48 RSV2 unconnected Reserved pin, leave open.

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package LQFP-48(7x7)
Category Interface
Pins 48

CAD (KiCad official)

  • Symbol: DIX9211PTR
  • Footprint: Package_QFP:LQFP-48_7x7mm_P0.5mm
  • 3D model: LQFP-48(7x7) (KiCad packages3D, STEP)
  • 3D model files: dix9211ptr-etched.step / dix9211ptr-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); dix9211ptr.step / dix9211ptr.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (110 pp, sha256 5b2484c0ee61c786, retrieved 2026-10-01, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-4-5-20251001 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF