component
DIX4192TPFBRQ1
Public Made by Adomby adom
Texas Instruments Audio Interface ICs, TQFP-48(7x7). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
main
123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434
{
"slug": "dix4192tpfbrq1",
"version": "0.1.0",
"type": "component",
"description": "Texas Instruments Audio Interface ICs, TQFP-48(7x7). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",
"tags": [
"component",
"interface",
"dix4192tpfbrq1",
"factory-2.0.0",
"extractor-text"
],
"dependencies": {},
"hero": {
"type": "image",
"path": "docs/hero.png"
},
"files": [
"page.json",
"README.md",
"dix4192tpfbrq1.kicad_sym",
"dix4192tpfbrq1.kicad_mod",
"dix4192tpfbrq1.glb",
"dix4192tpfbrq1.step",
"dix4192tpfbrq1.lbr",
"docs/hero.png",
"docs/dix4192tpfbrq1-datasheet.pdf",
"viewers/symbol.html",
"viewers/footprint.html",
"dix4192tpfbrq1-hero.glb",
"dix4192tpfbrq1-hero.overlay.json"
],
"component": {
"mpn": "DIX4192TPFBRQ1",
"manufacturer": "Texas Instruments",
"package": "TQFP-48(7x7)",
"pin_count": 48,
"category": "Interface",
"subcategory": "Audio Interface ICs",
"datasheet": "https://www.ti.com/cn/lit/gpn/dix4192-q1",
"parts": {
"symbol": "dix4192tpfbrq1.kicad_sym",
"footprint": "dix4192tpfbrq1.kicad_mod",
"model_3d": "dix4192tpfbrq1-hero.glb",
"model_3d_plain": "dix4192tpfbrq1.glb",
"model_3d_step": "dix4192tpfbrq1-etched.step",
"model_3d_step_plain": "dix4192tpfbrq1.step",
"lbr": "dix4192tpfbrq1.lbr"
},
"distributor_links": {
"lcsc": "C2871362",
"digikey": "296-46968-2-ND",
"mouser": "595-DIX4192TPFBRQ1"
},
"distributor_check": {
"checked_at": "2026-10-08T23:34:31Z",
"source": "Component Ocean /api/assign-pns",
"digikey": {
"pn": "296-46968-2-ND",
"status": "found",
"lifecycle": "Active"
},
"mouser": {
"pn": "595-DIX4192TPFBRQ1",
"status": "found"
}
},
"pins": [
{
"number": "1",
"name": "RX1+",
"type": "input",
"description": "Line receiver 1 noninverting input; differential input sensitivity is listed as 150 to 200 mV with 150 mV input hysteresis, and line receiver input voltage is limited to (VDD33 + 0.3) V."
},
{
"number": "2",
"name": "RX1–",
"type": "input",
"description": "Line receiver 1 inverting input; differential input sensitivity is listed as 150 to 200 mV with 150 mV input hysteresis, and line receiver input voltage is limited to (VDD33 + 0.3) V."
},
{
"number": "3",
"name": "RX2+",
"type": "input",
"description": "Line receiver 2 noninverting input; differential input sensitivity is listed as 150 to 200 mV with 150 mV input hysteresis, and line receiver input voltage is limited to (VDD33 + 0.3) V."
},
{
"number": "4",
"name": "RX2–",
"type": "input",
"description": "Line receiver 2 inverting input; differential input sensitivity is listed as 150 to 200 mV with 150 mV input hysteresis, and line receiver input voltage is limited to (VDD33 + 0.3) V."
},
{
"number": "5",
"name": "RX3+",
"type": "input",
"description": "Line receiver 3 noninverting input; differential input sensitivity is listed as 150 to 200 mV with 150 mV input hysteresis, and line receiver input voltage is limited to (VDD33 + 0.3) V."
},
{
"number": "6",
"name": "RX3–",
"type": "input",
"description": "Line receiver 3 inverting input; differential input sensitivity is listed as 150 to 200 mV with 150 mV input hysteresis, and line receiver input voltage is limited to (VDD33 + 0.3) V."
},
{
"number": "7",
"name": "RX4+",
"type": "input",
"description": "Line receiver 4 noninverting input; differential input sensitivity is listed as 150 to 200 mV with 150 mV input hysteresis, and line receiver input voltage is limited to (VDD33 + 0.3) V."
},
{
"number": "8",
"name": "RX4–",
"type": "input",
"description": "Line receiver 4 inverting input; differential input sensitivity is listed as 150 to 200 mV with 150 mV input hysteresis, and line receiver input voltage is limited to (VDD33 + 0.3) V."
},
{
"number": "9",
"name": "VCC",
"type": "power_in",
"description": "DIR comparator and PLL power supply, 3.3 V nominal; recommended range 3.0 to 3.6 V."
},
{
"number": "10",
"name": "AGND",
"type": "power_in",
"description": "DIR comparator and PLL power-supply ground."
},
{
"number": "11",
"name": "LOCK",
"type": "output",
"description": "DIR PLL lock flag, active low; it is asserted only when both the AES3 decoder and PLL2 indicate lock."
},
{
"number": "12",
"name": "RXCKO",
"type": "output",
"description": "DIR recovered master clock output, described as tri-state."
},
{
"number": "13",
"name": "RXCKI",
"type": "input",
"description": "DIR reference clock input."
},
{
"number": "14",
"name": "NC",
"type": "unconnected",
"description": "No internal signal connection; internally bonded to the ESD pad."
},
{
"number": "15",
"name": "NC",
"type": "unconnected",
"description": "No internal signal connection; internally bonded to the ESD pad."
},
{
"number": "16",
"name": "DGND1",
"type": "power_in",
"description": "Digital core ground."
},
{
"number": "17",
"name": "VDD18",
"type": "power_in",
"description": "Digital core supply, 1.8 V nominal; recommended range 1.65 to 1.95 V and absolute maximum 2 V."
},
{
"number": "18",
"name": "CPM",
"type": "input",
"description": "Control port mode select: 0 selects SPI mode and 1 selects I2C mode."
},
{
"number": "19",
"name": "CS/A0",
"type": "input",
"description": "Active-low chip select in SPI mode, or programmable slave address bit A0 in I2C mode."
},
{
"number": "20",
"name": "CCLK/SCL",
"type": "input",
"description": "Serial data clock for SPI mode or I2C mode (SCL)."
},
{
"number": "21",
"name": "CDIN/A1",
"type": "input",
"description": "SPI serial data input, or programmable slave address bit A1 in I2C mode."
},
{
"number": "22",
"name": "CDOUT/SDA",
"type": "bidirectional",
"description": "SPI serial data output (tri-state when CS is high), or serial data I/O (SDA) in I2C mode."
},
{
"number": "23",
"name": "INT",
"type": "output",
"description": "Interrupt flag, active-low open-drain output that requires a pullup to VIO (10 kΩ is suggested for most applications)."
},
{
"number": "24",
"name": "RST",
"type": "input",
"description": "Reset input, active low."
},
{
"number": "25",
"name": "MCLK",
"type": "input",
"description": "Master clock input, 1 to 27.7 MHz with 45% to 55% duty cycle."
},
{
"number": "26",
"name": "GPO1",
"type": "output",
"description": "General-purpose output 1, forced low/high or driven from an internal logic node selected through control registers 0x1B to 0x1E."
},
{
"number": "27",
"name": "GPO2",
"type": "output",
"description": "General-purpose output 2, forced low/high or driven from an internal logic node selected through control registers 0x1B to 0x1E."
},
{
"number": "28",
"name": "GPO3",
"type": "output",
"description": "General-purpose output 3, forced low/high or driven from an internal logic node selected through control registers 0x1B to 0x1E."
},
{
"number": "29",
"name": "GPO4",
"type": "output",
"description": "General-purpose output 4, forced low/high or driven from an internal logic node selected through control registers 0x1B to 0x1E."
},
{
"number": "30",
"name": "DGND2",
"type": "power_in",
"description": "DIR line receiver bias and DIT line driver digital ground."
},
{
"number": "31",
"name": "TX–",
"type": "output",
"description": "DIT line driver inverting output; differential output is 5.4 VPP into a 110 Ω load across TX+ and TX-."
},
{
"number": "32",
"name": "TX+",
"type": "output",
"description": "DIT line driver noninverting output; differential output is 5.4 VPP into a 110 Ω load across TX+ and TX-."
},
{
"number": "33",
"name": "VDD33",
"type": "power_in",
"description": "DIR line receiver bias and DIT line driver supply, 3.3 V nominal; recommended range 3.0 to 3.6 V."
},
{
"number": "34",
"name": "AESOUT",
"type": "output",
"description": "DIT buffered AES3-encoded CMOS logic-level output; forced low when AESOFF is set."
},
{
"number": "35",
"name": "BLS",
"type": "bidirectional",
"description": "DIT block start clock, configured as input or output by the BLSM register bit."
},
{
"number": "36",
"name": "SYNC",
"type": "output",
"description": "DIT internal sync clock output."
},
{
"number": "37",
"name": "BCKA",
"type": "bidirectional",
"description": "Audio serial port A bit clock."
},
{
"number": "38",
"name": "LRCKA",
"type": "bidirectional",
"description": "Audio serial port A left/right clock."
},
{
"number": "39",
"name": "SDINA",
"type": "input",
"description": "Audio serial port A data input."
},
{
"number": "40",
"name": "SDOUTA",
"type": "output",
"description": "Audio serial port A data output."
},
{
"number": "41",
"name": "NC",
"type": "unconnected",
"description": "No internal signal connection; internally bonded to the ESD pad."
},
{
"number": "42",
"name": "VIO",
"type": "power_in",
"description": "Logic I/O supply; operates from 1.65 V to 3.6 V (3.3 V nominal)."
},
{
"number": "43",
"name": "DGND3",
"type": "power_in",
"description": "Logic I/O ground."
},
{
"number": "44",
"name": "BGND",
"type": "power_in",
"description": "Substrate ground; connect to AGND (pin 10)."
},
{
"number": "45",
"name": "SDOUTB",
"type": "output",
"description": "Audio serial port B data output."
},
{
"number": "46",
"name": "SDINB",
"type": "input",
"description": "Audio serial port B data input."
},
{
"number": "47",
"name": "LRCKB",
"type": "bidirectional",
"description": "Audio serial port B left/right clock."
},
{
"number": "48",
"name": "BCKB",
"type": "bidirectional",
"description": "Audio serial port B bit clock."
}
],
"provenance": {
"extractor": "extract_pins 0.3",
"factory_chain": {
"factory": "2.0.0",
"extractor": "extract_pins 0.3",
"primary_model": "claude-haiku-5-5",
"primary_mode": "text",
"consensus_model": "claude-sonnet-5-5",
"consensus": "agreed",
"guards": "pin_guards 0.1: passed",
"guard_notes": [
"extractor flagged: Pinout is taken from the 48-pin TQFP (PFB) package, pages 4 and 5. The package addendum on page 63 l; The datasheet gives the type for pin 12 (RXCKO) as O, but its description says tri-state output. It ; Pins 19 to 22 are dual-function (SPI and I2C names). Pins 22, 35, 37, 38, 47 and 48 are typed I/O in"
],
"pages_sent": 15,
"cost_usd": 0.1115,
"at": "2026-10-08T23:33:30"
},
"datasheet": {
"url": "https://www.ti.com/cn/lit/gpn/dix4192-q1",
"pages": 70,
"sha256": "dde4e8a8e4e4e262",
"source_tier": "lcsc"
},
"cad": "KiCad official (CC-BY-SA 4.0)",
"pins": {
"total": 48,
"described": 48,
"cites_pages": true,
"refuses_to_fabricate": true
}
},
"viewers": {
"symbol": "viewers/symbol.html",
"footprint": "viewers/footprint.html"
},
"models_3d": [
{
"file": "dix4192tpfbrq1.step",
"role": "plain",
"up": "Z",
"units": "mm",
"origin": "footprint origin = pad-pattern centre",
"seat": "z = 0",
"extents_mm": [
9.0,
9.0,
1.1
],
"zmin_mm": -0.0,
"centre_offset_mm": 0.0,
"footprint_binding": "identity",
"sha256": "14ca7676e4932e92f0eca0c6d56ce3018cd28a2531204a70ab7bbacb3eeb3cf5",
"checked": "2026-10-08",
"checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
},
{
"file": "dix4192tpfbrq1-etched.step",
"role": "eda",
"up": "Z",
"units": "mm",
"origin": "footprint origin = pad-pattern centre",
"seat": "z = 0",
"extents_mm": [
9.0,
9.0,
1.1
],
"zmin_mm": -0.0,
"centre_offset_mm": 0.0,
"footprint_binding": "identity",
"sha256": "428943d345924b6d31af075666cfda9d5d0d319e8b9f11a7f41636834e902395",
"checked": "2026-10-08",
"checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
}
]
}
}