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DIO6809SST3
Public Made by Adomby adom
DIOO Supervisor And Reset ICs, SOT-23. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownDIO6809SST3
DIOO · Supervisor And Reset ICs · SOT-23
DIO6809SST3 from DIOO, in a SOT-23. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | GND | power_in | Ground terminal. |
| 2 | /RESET | output | CMOS active-low reset output that remains low while VCC drops below VRES-VHYST and for at least 140 ms after VCC rises above VRES. |
| 3 | VCC | power_in | Supply pin for the internal circuit and the monitored voltage; absolute maximum rating is -0.3 V to 6.0 V with respect to GND. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | DIOO |
| Package | SOT-23 |
| Category | Power Management (PMIC) |
| Pins | 3 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Minimum input voltage (VCCMIN) | VCCMIN | 1 | V | 4 | |||
| Maximum input voltage (VCCMAX) | VCCMAX | 5.5 | V | 4 | |||
| Reset threshold (DIO6809S) | VRES | 2.75 | 2.93 | 3.05 | V | 4 | |
| Temperature coefficient of reset threshold | TC | -100 | 100 | ppm | 4 | ||
| /RESET output voltage low | VOL | 0.3 | V | VCC=2V, VRES>2V, ISINK=1.5mA | 4 | ||
| Reset pulse width | TRES | 140 | 240 | 500 | ms | 4 | |
| Terminal voltage (with respect to GND) | VCC | -0.3 | 6 | V | 3 | ||
| Input current | VCC | 20 | mA | 3 | |||
| Thermal resistance | 300 | °C/W | 3 | ||||
| Operating temperature | -40 | 85 | °C | 3 | |||
| Lead temperature range (soldering) | 300 | °C | soldering 10s | 3 | |||
| Storage temperature | -65 | 150 | °C | 3 | |||
| ESD HBM | 4500 | V | JEDEC JESD22-A114 | 3 |
CAD (KiCad official)
- Symbol:
DIO6809SST3 - Footprint:
Package_TO_SOT_SMD:SOT-23 - 3D model: SOT-23 (KiCad packages3D, STEP)
- 3D model files:
dio6809sst3-etched.step/dio6809sst3-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);dio6809sst3.step/dio6809sst3.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: DIOO datasheet (8 pp, sha256
3d96d6b001b6914a, retrieved 2026-10-19, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).