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DGD2304S8-13

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Diodes Incorporated Gate Drive ICs, SO-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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DGD2304S8-13

Diodes Incorporated · Gate Drive ICs · SO-8

DGD2304S8-13 from Diodes Incorporated, in a SO-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 LIN input Logic input for the low-side gate driver output, in phase with LO; Schmitt-triggered with internal pull-down, VIH 2.3V min, VIL 0.7V max.
2 HIN input Logic input for the high-side gate driver output, in phase with HO; Schmitt-triggered with internal pull-down, VIH 2.3V min, VIL 0.7V max.
3 VCC power_in Low-side and logic fixed supply, recommended 10V to 20V (absolute max -0.3 to +24V).
4 COM power_in Low-side and logic return (ground reference for logic inputs and outputs).
5 LO output Low-side gate drive output, 290mA source / 600mA sink pulsed current capability.
6 VS power_in High-side floating supply return (offset), recommended up to 600V.
7 HO output High-side gate drive output, 290mA source / 600mA sink pulsed current capability.
8 VB power_in High-side floating supply, recommended VS+10V to VS+20V (absolute max -0.3 to +624V).

Key specifications

Parameter Value
Manufacturer Diodes Incorporated
Package SO-8
Category Power Supply Chip
Pins 8

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
High-Side Floating Supply Voltage VB -0.3 624 V TA = +25°C 3
Offset Supply Voltage Transient dVS/dt 50 V/ns TA = +25°C 3
Low-Side and Logic Fixed Supply Voltage VCC -0.3 24 V TA = +25°C 3
Operating Temperature TJ 150 °C 3
Lead Temperature (Soldering, 10s) TL 300 °C 3
Storage Temperature Range TSTG -55 150 °C 3
Power Dissipation PD 1.25 W Linear derating factor; JEDEC 2-layer FR-4 board 3
Thermal Resistance, Junction to Ambient RθJA 55 °C/W JEDEC 2-layer FR-4 board 3
High-Side Floating Supply Offset Voltage VS 600 V Logic operation for VS of -5V to +600V 3
Low-Side and Logic Fixed Supply Voltage VCC 10 20 V 3
Low-Side Output Voltage VLO 0 V Max printed as VCC 3
Logic Input Voltage VIN 0 5 V 3
Ambient Temperature TA -40 125 °C 3
Logic 1 Input Voltage VIH 2.3 V VCC = 10V to 20V 4
Logic 0 Input Voltage VIL 0.7 V VCC = 10V to 20V 4
High Level Output Voltage, VBIAS - VO VOH 0.05 0.2 V IO = 2mA 4
Low Level Output Voltage, VO VOL 0.02 0.1 V IO = 2mA 4
Offset Supply Leakage Current ILK 50 µA VB = VS = 600V 4
Quiescent VBS Supply Current IBSQ 20 60 150 µA VIN = 0V or 5V 4
Quiescent VCC Supply Current ICCQ 50 260 400 µA VIN = 0V or 5V 4
Logic 1 Input Bias Current IIN+ 5 40 µA VIN = 5V 4
Logic 0 Input Bias Current IIN- 1 5 µA VIN = 0V 4
VBS Supply Under-Voltage Positive Going Threshold VBSUV+ 7.7 8.7 9.7 V 4
VBS Supply Under-Voltage Negative Going Threshold VBSUV- 7 8 9 V 4
VCC Supply Under-Voltage Positive Going Threshold VCCUV+ 7.7 8.7 9.7 V 4
VCC Supply Under-Voltage Negative Going Threshold VCCUV- 7 8 9 V 4
Output High Short Circuit Pulsed Current IO+ 60 290 mA VO = 0V, PW ≤ 10µs 4
Output Low Short Circuit Pulsed Current IO- 130 600 mA VO = 15V, PW ≤ 10µs 4
Turn-On Propagation Delay tON 95 210 ns VS = 0V 4
Turn-Off Propagation Delay tOFF 100 210 ns VS = 0V or 600V 4
Delay Matching, HO and LO Turn-On / Turn-Off tDM ON 50 ns 4
Turn-On Rise Time tr 70 120 ns 4
Turn-Off Fall Time tf 35 60 ns 4
Deadtime: tDT LO-HO and tDT HO-LO tDT 80 100 190 ns 4

Materials and finish

As the datasheet states them (page.json metadata.appearance; the 3D model's colours follow it).

Part Material Colour / plating Datasheet says Page
contacts tin  Terminals: Finish, Matte Tin Plated Leads, Solderable per MIL-STD-202, Method 208 1

CAD (KiCad official)

  • Symbol: DGD2304S8-13
  • Footprint: Package_SO:SOIC-8_3.9x4.9mm_P1.27mm
  • 3D model: SO-8 (KiCad packages3D, STEP)
  • 3D model files: dgd2304s8-13-etched.step / dgd2304s8-13-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); dgd2304s8-13.step / dgd2304s8-13.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Diodes Incorporated datasheet (11 pp, sha256 a935c6a957988778, retrieved 2026-10-23, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF