component
DGD2110S16-13
Public Made by Adomby adom
Diodes Incorporated Gate Drive ICs, SOP-16-300mil. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
Generated by kicad-footprint-generator · KiCad file format 20260206
DGD2110S16-13
Diodes Incorporated · Gate Drive ICs · SOP-16-300mil
DGD2110S16-13 from Diodes Incorporated, in a SOP-16-300mil. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model). Symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | LO | output | Low-side gate driver output pin, referenced to COM, driving the low-side MOSFET or IGBT gate with 2.5A typical source/sink current. |
| 2 | COM | power_in | Low-side gate driver power supply return pin; the LO output and VCC are referenced to this pin, and VO and IO parameters are referenced to COM. |
| 3 | VCC | power_in | Low-side gate driver power supply pin; recommended operating range is 10V to 20V with respect to COM. |
| 4 | NC | unconnected | No connect pin (no internal connection). |
| 5 | NC | unconnected | No connect pin (no internal connection). |
| 6 | VS | power_in | High-side gate driver floating power supply return pin; the offset voltage is specified from VB-24V to VB+0.3V and logic operation is for VS = -4V to +500V (DGD2110) or up to +600V (DGD2113). |
| 7 | VB | power_in | High-side gate driver floating power supply pin; recommended operating range is VS + 10V to VS + 20V, with absolute maximum of 524V (DGD2110) or 624V (DGD2113) referenced to ground. |
| 8 | HO | output | High-side gate drive output pin, referenced to VS, with output voltage between VS-0.3V and VS+0.3V. |
| 9 | NC | unconnected | No connect pin (no internal connection). |
| 10 | NC | unconnected | No connect pin (no internal connection). |
| 11 | VDD | power_in | Logic power supply pin; recommended operating range is VSS + 3V to VSS + 20V. |
| 12 | HIN | input | Logic input pin for the high-side gate driver output, in phase with HO; logic input voltage range is VSS to VDD. |
| 13 | SD | input | Logic input shutdown pin for both gate driver outputs; logic input voltage range is VSS to VDD. |
| 14 | LIN | input | Logic input pin for the low-side gate driver output, in phase with LO; logic input voltage range is VSS to VDD. |
| 15 | VSS | power_in | Logic ground pin; recommended logic supply offset voltage range is -5V to +5V relative to COM. |
| 16 | NC | unconnected | No connect pin (no internal connection). |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Diodes Incorporated |
| Package | SOP-16-300mil |
| Category | Power Management ICs |
| Pins | 16 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| High-side floating supply voltage (DGD2110) | VB | -0.3 | 524 | V | 3 | ||
| Offset supply voltage transient | dVS / dt | 50 | V/ns | 3 | |||
| Low-side fixed supply voltage | VCC | -0.3 | 24 | V | 3 | ||
| Logic supply voltage | VDD | -0.3 | V | 3 | |||
| Power Dissipation (linear derating factor) | PD | 1.25 | W | Note 5: standard JEDEC 2-layer FR-4 board | 3 | ||
| Thermal Resistance, Junction to Ambient | RθJA | 90 | °C/W | Note 5: standard JEDEC 2-layer FR-4 board | 3 | ||
| Thermal Resistance, Junction to Case | RθJC | 45 | °C/W | Note 5: standard JEDEC 2-layer FR-4 board | 3 | ||
| Operating Temperature | TJ | 150 | °C | 3 | |||
| Lead Temperature | TL | 300 | °C | soldering, 10 seconds | 3 | ||
| Storage Temperature Range | TSTG | -55 | 150 | °C | 3 | ||
| High-side floating supply offset voltage (DGD2110) | VS | 500 | V | Note 6 | 3 | ||
| Low-side fixed supply voltage | VCC | 10 | 20 | V | 3 | ||
| Low-side output voltage | VLO | 0 | V | 3 | |||
| Logic supply offset voltage | VSS | -5 | 5 | V | Note 7 | 3 | |
| Ambient temperature | TA | -40 | 125 | °C | 3 | ||
| Logic "1" input voltage | VIH | 9.5 | V | 4 | |||
| Logic "0" input voltage | VIL | 6 | V | 4 | |||
| High level output voltage, VBIAS - VO | VOH | 1.4 | V | IO = 0mA | 4 | ||
| Low level output voltage, VO | VOL | 0.15 | V | IO = 20mA | 4 | ||
| Offset supply leakage current | ILK | 50 | µA | VB = VS = 500V/600V | 4 | ||
| Quiescent VBS supply current | IBSQ | 55 | 230 | µA | VIN = 0V or VDD | 4 | |
| Quiescent VCC supply current | ICCQ | 56 | 340 | µA | VIN = 0V or VDD | 4 | |
| Quiescent VDD supply current | IDDQ | 0.6 | 30 | µA | VIN = 0V or VDD | 4 | |
| Logic "1" input bias current | IIN+ | 20 | 40 | µA | VIN = VDD | 4 | |
| Logic "0" input bias current | IIN- | 5 | µA | VIN = 0V | 4 | ||
| VBS supply undervoltage positive going threshold | VBSUV+ | 7.5 | 8.6 | 9.7 | V | 4 | |
| VBS supply undervoltage negative going threshold | VBSUV- | 7 | 8.2 | 9.4 | V | 4 | |
| VCC supply undervoltage positive going threshold | VCCUV+ | 7.4 | 8.5 | 9.6 | V | 4 | |
| VCC supply undervoltage negative going threshold | VCCUV- | 7 | 8.2 | 9.4 | V | 4 | |
| Output high short circuit pulsed current | IO+ | 2 | 2.5 | A | VO = 0V, VIN = VDD, PW ≤ 10µs | 4 | |
| Output low short circuit pulsed current | IO- | 2 | 2.5 | A | VO = 15V, VIN = 0V, PW ≤ 10µs | 4 | |
| Turn-on propagation delay | tON | 105 | 150 | ns | VS = 0V | 4 | |
| Turn-off propagation delay | tOFF | 94 | 125 | ns | VS = 500V/600V | 4 | |
| Shut down propagation delay | tSD | 70 | 140 | ns | VS = 500V/600V | 4 | |
| Turn-on rise time | tr | 15 | 35 | ns | 4 | ||
| Turn-off fall time | tf | 13 | 25 | ns | 4 | ||
| Delay matching DGD2110 | tDM | 10 | ns | 4 |
Materials and finish
As the datasheet states them (page.json metadata.appearance; the 3D model's colours follow it).
| Part | Material | Colour / plating | Datasheet says | Page |
|---|---|---|---|---|
| contacts | tin | Terminals: Finish, Matte Tin Plated Leads, Solderable per MIL-STD-202, Method 208 | 1 |
CAD (KiCad official)
- Symbol:
DGD2110S16-13 - Footprint:
Package_SO:SOIC-16W_7.5x10.3mm_P1.27mm - 3D model: SOP-16-300mil (KiCad packages3D, STEP)
- 3D model files:
dgd2110s16-13-etched.step/dgd2110s16-13-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);dgd2110s16-13.step/dgd2110s16-13.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Diodes Incorporated datasheet (12 pp, sha256
c8c7d374f89d08b9, retrieved 2026-11-13, tier: manufacturer) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).