# DGD2003S8-13

**Diodes Incorporated** · Gate Drive ICs · SO-8

DGD2003S8-13 from Diodes Incorporated, in a SO-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

## Pinout

| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | VCC | power_in | Logic and low-side supply, recommended 10V to 20V (absolute maximum -0.3 to +24V). |
| 2 | HIN | input | Logic input for the high-side gate driver output, in phase with HO, with VIH min 2.5V and VIL max 0.8V. |
| 3 | LIN* | input | Logic input for the low-side gate driver output, out of phase with LO, with VIH min 2.5V and VIL max 0.8V. |
| 4 | COM | power_in | Low-side and logic return (ground reference). |
| 5 | LO | output | Low-side gate drive output, 290mA source / 600mA sink typical short-circuit pulsed current, swinging 0V to VCC. |
| 6 | VS | power_in | High-side floating supply return, with offset voltage up to 200V in bootstrap operation. |
| 7 | HO | output | High-side gate drive output, 290mA source / 600mA sink typical short-circuit pulsed current, swinging VS to VB. |
| 8 | VB | power_in | High-side floating supply, recommended VS+10V to VS+20V (absolute maximum -0.3 to +224V). |

## Key specifications

| Parameter | Value |
|---|---|
| Manufacturer | Diodes Incorporated |
| Package | SO-8 |
| Category | Power Supply Chip |
| Pins | 8 |

## Electrical characteristics

Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).

| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| High-Side Floating Supply Voltage | VB | -0.3 |  | 224 | V | TA = +25°C | 3 |
| Offset Supply Voltage Transient | dVS/dt |  |  | 50 | V/ns | TA = +25°C | 3 |
| Low-Side Fixed Supply Voltage | VCC | -0.3 |  | 24 | V | TA = +25°C | 3 |
| Power Dissipation Linear Derating Factor | PD |  |  | 0.625 | W | Mounted on standard JEDEC 2-layer FR-4 board | 3 |
| Thermal Resistance, Junction to Ambient | RθJA |  | 200 |  | °C/W | Mounted on standard JEDEC 2-layer FR-4 board | 3 |
| Operating Temperature | TJ |  |  | 150 | °C |  | 3 |
| Lead Temperature (Soldering, 10s) | TL |  |  | 300 | °C |  | 3 |
| Storage Temperature Range | TSTG | -55 |  | 150 | °C |  | 3 |
| High Side Floating Supply Offset Voltage | VS |  |  | 200 | V | Logic operation for VS of -5V to +200V | 3 |
| Low Side Supply Voltage | VCC | 10 |  | 20 | V |  | 3 |
| Logic Input Voltage (HIN and LIN*) | VIN | 0 |  | 5 | V |  | 3 |
| Ambient Temperature | TA | -40 |  | 125 | °C |  | 3 |
| Logic 1 (HIN) / Logic 0 (LIN*) Input Voltage | VIH | 2.5 |  |  | V | VCC = 10V to 20V | 4 |
| Logic 0 (HIN) / Logic 1 (LIN*) Input Voltage | VIL |  |  | 0.8 | V | VCC = 10V to 20V | 4 |
| High Level Output Voltage, VBIAS - VO | VOH |  | 0.05 | 0.2 | V | IO = 2mA | 4 |
| Low Level Output Voltage, VO | VOL |  | 0.02 | 0.1 | V | IO = 2mA | 4 |
| Offset Supply Leakage Current | ILK |  |  | 50 | µA | VB = VS = 200V | 4 |
| Quiescent VBS Supply Current | IBSQ |  | 60 | 100 | µA | VIN = 0V or 5V | 4 |
| Quiescent VCC Supply Current | ICCQ |  | 350 | 500 | µA | VIN = 0V or 5V | 4 |
| Logic 1 Input Bias Current | IIN+ |  | 3 | 10 | µA | HIN = 5V, LIN* = 0V | 4 |
| Logic 0 Input Bias Current | IIN- |  |  | 5 | µA | HIN = 0V, LIN* = 5V | 4 |
| VCC Supply Undervoltage Positive Going Threshold | VCCUV+ | 8 | 8.9 | 9.8 | V |  | 4 |
| VCC Supply Undervoltage Negative Going Threshold | VCCUV- | 7.4 | 8.2 | 9 | V |  | 4 |
| VBS Supply Undervoltage Positive Going Threshold | VBSUV+ | 4.5 | 5.5 | 6.5 | V |  | 4 |
| VBS Supply Undervoltage Negative Going Threshold | VBSUV- | 4.2 | 5.2 | 6.2 | V |  | 4 |
| Output High Short Circuit Pulsed Current | IO+ | 130 | 290 |  | mA | VO = 0V, PW ≤ 10µs | 4 |
| Output Low Short Circuit Pulsed Current | IO- | 270 | 600 |  | mA | VO = 15V, PW ≤ 10µs | 4 |
| Turn-On Propagation Delay | tON |  | 680 | 820 | ns | VS = 0V | 4 |
| Turn-Off Propagation Delay | tOFF |  | 150 | 220 | ns | VS = 200V | 4 |
| Delay Matching, HO and LO Turn-On/Turn-Off | tDM |  |  | 60 | ns |  | 4 |
| Turn-On Rise Time | tR |  | 70 | 170 | ns | VS = 0V | 4 |
| Turn-Off Fall Time | tF |  | 35 | 90 | ns | VS = 0V | 4 |
| Deadtime: LO-HO and HO-LO | tDT | 300 | 420 | 650 | ns |  | 4 |

## Materials and finish

As the datasheet states them (page.json `metadata.appearance`; the 3D model's colours follow it).

| Part | Material | Colour / plating | Datasheet says | Page |
|---|---|---|---|---|
| contacts |  | tin |  Terminals: Finish, Matte Tin Plated Leads. Solderable per MIL-STD-202, Method 208 | 1 |

## CAD (KiCad official)

- Symbol: `DGD2003S8-13`
- Footprint: `Package_SO:SOIC-8_3.9x4.9mm_P1.27mm`
- 3D model: SO-8 (KiCad packages3D, STEP)
- 3D model files: `dgd2003s8-13-etched.step` / `dgd2003s8-13-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `dgd2003s8-13.step` / `dgd2003s8-13.glb` are the bare package body.

## Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

- **Datasheet:** [Diodes Incorporated datasheet](https://www.diodes.com/assets/Datasheets/DGD2003S8-13.pdf) (11 pp, sha256 `196668f5f8e77994`, retrieved 2026-10-30, tier: manufacturer)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-sonnet-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).

[Datasheet PDF](docs/dgd2003s8-13-datasheet.pdf)