main
Ray Set visibility: public 1a72d4a 2d ago
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{
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  "slug": "dgd0280wt-7",
  "title": "DGD0280WT-7",
  "brief": "Diodes Incorporated Gate Drive ICs, TSOT-23-5. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",
  "version": "0.1.0",
  "license": "CC-BY-SA-4.0",
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    "power supply chip",
    "dgd0280wt-7",
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    "mpn": "DGD0280WT-7",
    "manufacturer": "Diodes Incorporated",
    "package": "TSOT-23-5",
    "pin_count": 5,
    "category": "Power Supply Chip",
    "subcategory": "Gate Drive ICs",
    "datasheet": "https://www.diodes.com/assets/Datasheets/DGD0280WT-7.pdf",
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      "lcsc": "C1849478",
      "digikey": "31-DGD0280WT-7TR-ND",
      "mouser": "621-DGD0280WT-7"
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    "distributor_check": {
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      "source": "Component Ocean /api/assign-pns",
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        "status": "found",
        "lifecycle": "Active"
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        "pn": "621-DGD0280WT-7",
        "status": "found"
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    },
    "pins": [
      {
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        "name": "VCC",
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        "description": "Low-side fixed supply input, recommended operating range 4.5 V to 18 V, with absolute maximum of -0.3 V to +22 V and internal UVLO that turns the output off when VCC falls below the operating range."
      },
      {
        "number": "2",
        "name": "COM",
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        "description": "Supply return (ground) for the driver, which is the reference for the logic input, the gate drive output and the LDO."
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      {
        "number": "3",
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      },
      {
        "number": "4",
        "name": "3V3",
        "type": "power_out",
        "description": "Integrated LDO regulator output at 3.3 V (3.267 V to 3.333 V at IOUT = 10 mA), capable of supplying up to 15 mA."
      },
      {
        "number": "5",
        "name": "OUT",
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        "description": "Non-inverted gate drive output for the external MOSFET or IGBT, with 2.5 A source and 2.8 A sink peak current capability, and an output voltage range of -0.3 V to VCC + 0.3 V."
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        "primary_model": "claude-haiku-5-5",
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        "consensus_model": "claude-sonnet-5-5",
        "consensus": "agreed",
        "guards": "pin_guards 0.1: passed",
        "guard_notes": [
          "extractor flagged: Package naming mismatch: the requested hint is TSOT-23-5, but the datasheet (ordering table, Mechani; Pin descriptions combine the pin function from the page 2 pin table with limits stated elsewhere in ; Pin 2 is printed as 'COM Supply Return'. The schema specifies GND as power_in, so COM was typed powe"
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        "at": "2026-10-24T05:37:27"
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      "Package": "TSOT-23-5",
      "Category": "Power Supply Chip",
      "Pins": "5"
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    "appearance": {
      "contacts": {
        "quote": " Terminals: Finish—Matte Tin Plated Leads. Solderable per MIL-STD-202, Method 208",
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        "doc": "ds.pdf",
        "plating": "tin"
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          "name": "Quiescent VCC Supply Current",
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          "conditions": "Inputs Open",
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        {
          "name": "VCC Supply Undervoltage Positive Going Threshold",
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          "name": "VCC Supply Undervoltage Negative Going Threshold",
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        {
          "name": "LDO Current Limit",
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          "conditions": "RL = 0Ω",
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          "name": "Turn-On Rise Time",
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          "kind": "timing",
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          "name": "Storage Temperature Range",
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          "name": "Lead Temperature (Soldering)",
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          "min": null,
          "typ": null,
          "max": 300,
          "conditions": "Soldering, 10s",
          "source_page": 3,
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          "name": "Power Dissipation Linear Derating Factor",
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          "kind": "thermal",
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          "min": null,
          "typ": 0.89,
          "max": null,
          "conditions": "Note 5: standard JEDEC 2-layer FR-4 board with minimum recommended pad layout",
          "source_page": 3,
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          "name": "Thermal Resistance, Junction to Ambient",
          "symbol": "RθJA",
          "kind": "thermal",
          "unit": "°C/W",
          "min": null,
          "typ": 117,
          "max": null,
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          "source_page": 3,
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        },
        {
          "name": "Thermal Resistance, Junction to Case",
          "symbol": "RθJC",
          "kind": "thermal",
          "unit": "°C/W",
          "min": null,
          "typ": 12.5,
          "max": null,
          "conditions": "Note 5: standard JEDEC 2-layer FR-4 board with minimum recommended pad layout",
          "source_page": 3,
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  "author": {
    "name": "Ray",
    "email": "[email protected]"
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