component
DG469EY-T1-E3
Public Made by Adomby adom
Vishay Analog Switches, Multiplexers, SOIC-8. Pinout extracted from the datasheet, KiCad symbol/footprint/3D.
main
Ray
dg469ey-t1-e3: component.models_3d pose record per STEP (Z-up, seated z=0, pad-centre origin, identity binding)
f1c137f
22h ago
123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198
{
"schema_version": 1,
"type": "component",
"slug": "dg469ey-t1-e3",
"title": "DG469EY-T1-E3",
"brief": "Vishay Analog Switches, Multiplexers, SOIC-8. Pinout extracted from the datasheet, KiCad symbol/footprint/3D.",
"version": "0.1.0",
"license": "CC-BY-SA-4.0",
"tags": [
"component",
"interface",
"dg469ey-t1-e3"
],
"component": {
"mpn": "DG469EY-T1-E3",
"manufacturer": "Vishay",
"package": "SOIC-8",
"pin_count": 8,
"category": "Interface",
"subcategory": "Analog Switches, Multiplexers",
"datasheet": "https://datasheet.lcsc.com/datasheet/pdf/60b99e8ebada6b9cfdaa4bbd2eaa3e9c.pdf",
"parts": {
"symbol": "dg469ey-t1-e3.kicad_sym",
"footprint": "dg469ey-t1-e3.kicad_mod",
"model_3d": "dg469ey-t1-e3-etched.glb",
"model_3d_plain": "dg469ey-t1-e3.glb",
"model_3d_step": "dg469ey-t1-e3-etched.step",
"model_3d_step_plain": "dg469ey-t1-e3.step",
"lbr": "dg469ey-t1-e3.lbr"
},
"distributor_links": {},
"pins": [
{
"number": "1",
"name": "COM",
"type": "passive",
"description": "Common terminal of the SPDT switch. Connects to either NC or NO depending on the logic state of IN. Bidirectional analog signal path, ±15 V signal range, 3.6 Ω typical on-resistance."
},
{
"number": "2",
"name": "NC",
"type": "passive",
"description": "Normally-closed switch terminal. Connected to COM when IN = logic 0, open when IN = logic 1. Bidirectional analog path, ±15 V signal range."
},
{
"number": "3",
"name": "GND",
"type": "power_in",
"description": "Ground reference for the device. Digital logic thresholds (0.8 V/2.4 V) are referenced to GND. GND-to-V- rating 25 V maximum."
},
{
"number": "4",
"name": "V+",
"type": "power_in",
"description": "Positive supply pin. Operates at +12 V single supply or +4.5 V to +15 V in dual-supply configurations. V+ to V- absolute maximum 44 V."
},
{
"number": "5",
"name": "NC",
"type": "unconnected",
"description": "No Connect. This pin is not internally bonded on the DG469 (the enable pin position used by the DG470 variant). Leave floating or tie to a convenient node."
},
{
"number": "6",
"name": "IN",
"type": "input",
"description": "Digital logic control input selecting which throw is connected to COM. TTL/CMOS-compatible thresholds (VIL = 0.8 V, VIH = 2.4 V). Logic 0 = NC on / NO off; logic 1 = NC off / NO on. Input current ±1 µA max."
},
{
"number": "7",
"name": "V-",
"type": "power_in",
"description": "Negative supply pin. Operates at 0 V for single-supply (+12 V) operation or -4.5 V to -15 V in dual-supply configurations. V+ to V- absolute maximum 44 V."
},
{
"number": "8",
"name": "NO",
"type": "passive",
"description": "Normally-open switch terminal. Connected to COM when IN = logic 1, open when IN = logic 0. Bidirectional analog path, ±15 V signal range."
}
],
"provenance": {
"extractor": "ds2sf",
"datasheet": {
"url": "https://datasheet.lcsc.com/datasheet/pdf/60b99e8ebada6b9cfdaa4bbd2eaa3e9c.pdf",
"pages": 9,
"sha256": "12340dcb77494221",
"source_tier": "mfr"
},
"cad": "KiCad official (CC-BY-SA 4.0)",
"pins": {
"total": 8,
"described": 8,
"cites_pages": true,
"refuses_to_fabricate": true
}
},
"viewers": {
"symbol": "viewers/symbol.html",
"footprint": "viewers/footprint.html"
},
"models_3d": [
{
"file": "dg469ey-t1-e3.step",
"role": "plain",
"up": "Z",
"units": "mm",
"origin": "footprint origin = pad-pattern centre",
"seat": "z = 0",
"extents_mm": [
6.0,
4.9,
1.75
],
"zmin_mm": -0.0,
"centre_offset_mm": 0.0,
"footprint_binding": "identity",
"sha256": "07f46cff378d30e6c27dfd5a03092c795323f86d91c71fc7e743f4f418dc553a",
"checked": "2026-10-07",
"checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
},
{
"file": "dg469ey-t1-e3-etched.step",
"role": "eda",
"up": "Z",
"units": "mm",
"origin": "footprint origin = pad-pattern centre",
"seat": "z = 0",
"extents_mm": [
6.0,
4.9,
1.75
],
"zmin_mm": -0.0,
"centre_offset_mm": 0.0,
"footprint_binding": "identity",
"sha256": "294e1da1d570d1f580d42502430e389cf09f1790b44dab6eebdb14ba8d3ea4f2",
"checked": "2026-10-07",
"checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
}
]
},
"metadata": {
"specs": {
"Manufacturer": "Vishay",
"Package": "SOIC-8",
"Category": "Interface",
"Pins": "8"
}
},
"variants": [
{
"mpn": "DG469EY-T1-E3",
"kind": "packaging"
},
{
"mpn": "DG469EY-T1-E3EQ-T1-E3",
"kind": "packaging"
}
],
"sections": [
"hero",
"viewers",
"readme",
"breadcrumbs",
"info"
],
"discovery_triggers": [
"dg469ey-t1-e3"
],
"discovery_pitch": "DG469EY-T1-E3 (Vishay) component page with datasheet-verified CAD.",
"author": {
"name": "Ray",
"email": "[email protected]"
},
"dependencies": {},
"hero": {
"type": "image",
"path": "docs/hero.png"
},
"files": [
"page.json",
"README.md",
"dg469ey-t1-e3.kicad_sym",
"dg469ey-t1-e3.kicad_mod",
"dg469ey-t1-e3.glb",
"dg469ey-t1-e3.step",
"dg469ey-t1-e3.lbr",
"docs/hero.png",
"docs/dg469ey-t1-e3-datasheet.pdf",
"viewers/symbol.html",
"viewers/footprint.html"
],
"visibility": {
"public": true
},
"updated_at": "2026-09-24T19:45:17.296Z"
}