component
DG442LEDY-T1-GE3
Public Made by Adomby adom
Vishay Intertech Analog Switches, Multiplexers, SOIC-16. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
Open in new tab ↗
Loads when you scroll to it. Unloads after 5 minutes in the background.
Symbol & Footprint
Schematic Symbol
Open full view ↗Loads when you scroll to it. Unloads after 5 minutes in the background.
PCB Footprint
Open full view ↗Loads when you scroll to it. Unloads after 5 minutes in the background.
Datasheet
Open in new tab ↗Loads when you scroll to it. Unloads after 5 minutes in the background.
README
markdownDG442LEDY-T1-GE3
Vishay Intertech · Analog Switches, Multiplexers · SOIC-16
DG442LEDY-T1-GE3 from Vishay Intertech, in a SOIC-16. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | IN1 | input | Logic control input for switch 1, TTL/CMOS compatible with logic 0 at 0.8 V and logic 1 at 2.4 V; on the DG442LE a logic 1 turns the switch on. |
| 2 | D1 | passive | Drain terminal of switch 1; signals beyond V+ or V- are clamped by internal diodes, so forward diode current must be limited to the maximum current ratings (30 mA continuous, any terminal). |
| 3 | S1 | passive | Source terminal of switch 1; signals beyond V+ or V- are clamped by internal diodes, so forward diode current must be limited to the maximum current ratings (30 mA continuous, any terminal). |
| 4 | V- | power_in | Negative supply, rated for dual supply operation at -3 V to -8 V; the datasheet uses V- = 0 V for single-supply operation, and V+ to V- is absolutely limited to 18 V. |
| 5 | GND | power_in | Ground reference for the logic inputs; GND to V- is absolutely limited to 18 V. |
| 6 | S4 | passive | Source terminal of switch 4; signals beyond V+ or V- are clamped by internal diodes, so forward diode current must be limited to the maximum current ratings (30 mA continuous, any terminal). |
| 7 | D4 | passive | Drain terminal of switch 4; signals beyond V+ or V- are clamped by internal diodes, so forward diode current must be limited to the maximum current ratings (30 mA continuous, any terminal). |
| 8 | IN4 | input | Logic control input for switch 4, TTL/CMOS compatible with logic 0 at 0.8 V and logic 1 at 2.4 V; on the DG442LE a logic 1 turns the switch on. |
| 9 | IN3 | input | Logic control input for switch 3, TTL/CMOS compatible with logic 0 at 0.8 V and logic 1 at 2.4 V; on the DG442LE a logic 1 turns the switch on. |
| 10 | D3 | passive | Drain terminal of switch 3; signals beyond V+ or V- are clamped by internal diodes, so forward diode current must be limited to the maximum current ratings (30 mA continuous, any terminal). |
| 11 | S3 | passive | Source terminal of switch 3; signals beyond V+ or V- are clamped by internal diodes, so forward diode current must be limited to the maximum current ratings (30 mA continuous, any terminal). |
| 12 | NC | unconnected | No internal connection shown for this pin in the datasheet pin configuration. |
| 13 | V+ | power_in | Positive supply, rated 3 V to 16 V single supply or ±3 V to ±8 V dual supply; V+ to V- is absolutely limited to 18 V. |
| 14 | S2 | passive | Source terminal of switch 2; signals beyond V+ or V- are clamped by internal diodes, so forward diode current must be limited to the maximum current ratings (30 mA continuous, any terminal). |
| 15 | D2 | passive | Drain terminal of switch 2; signals beyond V+ or V- are clamped by internal diodes, so forward diode current must be limited to the maximum current ratings (30 mA continuous, any terminal). |
| 16 | IN2 | input | Logic control input for switch 2, TTL/CMOS compatible with logic 0 at 0.8 V and logic 1 at 2.4 V; on the DG442LE a logic 1 turns the switch on. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Vishay Intertech |
| Package | SOIC-16 |
| Category | Interface |
| Pins | 16 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Supply voltage V+ to V- | -0.3 | 18 | V | 2 | |||
| GND to V- | 18 | V | 2 | ||||
| Digital Inputs VS, VD | -0.3 | V | Referenced to GND; max printed as (V+)+0.3 or 30 mA, whichever occurs first | 2 | |||
| Continuous current, any terminal | 30 | mA | 2 | ||||
| Current, S or D (pulsed) | 100 | Pulsed 1 ms, 10% duty cycle | 2 | ||||
| Storage temperature | -65 | 125 | °C | DQ, DY suffix | 2 | ||
| Power dissipation, 16-pin narrow body SOIC | 650 | mW | Note d: derate 7.6 mW/°C above 75 °C | 2 | |||
| ESD Human Body Model (HBM) | 2500 | V | Per ANSI/ESDA/JEDEC JS-001 | 2 | |||
| Latch-up current | 400 | mA | Per JESD78D | 2 | |||
| Single supply voltage range | 3 | 16 | V | Single supply, per Features text | 1 | ||
| Dual supply voltage range | 3 | 8 | V | Dual supply ±3 V to ±8 V (per rail magnitude), per Features text; dual supply recommended | 1 | ||
| Analog signal range | VANALOG | 0 | 12 | V | Full; V+ = 12 V, V- = 0 V (12 V single supply table) | 3 | |
| Drain-source on-resistance RDS(on) | RDS(on) | 16 | 26 | Ω | Room; V+ = 10.8 V, V- = 0 V; IS = 10 mA, VD = 2 V / 9 V | 3 | |
| Drain-source on-resistance RDS(on) | RDS(on) | 35 | Ω | Full; V+ = 10.8 V, V- = 0 V; IS = 10 mA, VD = 2 V / 9 V | 3 | ||
| On-resistance match between channels | RDS(on) | 0.1 | 0.5 | Ω | Room; IS = 10 mA, VD = 9 V | 3 | |
| Switch off leakage current IS(off) | IS(off) | -1 | 1 | nA | Room; VD = 1 V / 11 V, VS = 11 V / 1 V | 3 | |
| Switch off leakage current IS(off) | IS(off) | -10 | 10 | nA | Full; VD = 1 V / 11 V, VS = 11 V / 1 V | 3 | |
| Switch off leakage current ID(off) | ID(off) | -1 | 1 | nA | Room; VD = 1 V / 11 V, VS = 11 V / 1 V | 3 | |
| Switch off leakage current ID(off) | ID(off) | -10 | 10 | nA | Full; VD = 1 V / 11 V, VS = 11 V / 1 V | 3 | |
| Channel on leakage current ID(on) | ID(on) | -1 | 1 | nA | Room; VS = VD = 11 V / 1 V | 3 | |
| Channel on leakage current ID(on) | ID(on) | -10 | 10 | nA | Full; VS = VD = 11 V / 1 V | 3 | |
| Input current, VIN low | IIL | -1 | 0.01 | 1 | μA | Full; VIN under test = 0.8 V | 3 |
| Input current, VIN high | IIH | -1 | 1 | μA | Full; VIN under test = 2.4 V | 3 | |
| Turn-on time | tON | 18 | 60 | ns | Room; RL = 300, CL = 35 pF, VS = 5 V | 3 | |
| Turn-on time | tON | 70 | ns | Full; RL = 300, CL = 35 pF, VS = 5 V | 3 | ||
| Turn-off time | tOFF | 18 | 35 | ns | Room; RL = 300, CL = 35 pF, VS = 5 V | 3 | |
| Turn-off time | tOFF | 45 | ns | Full; RL = 300, CL = 35 pF, VS = 5 V | 3 | ||
| Positive supply current | I+ | 0.03 | 1 | μA | Full; VIN = 0 V or 12 V | 3 | |
| Negative supply current | I- | -1 | μA | Room; VIN = 0 V or 12 V | 3 | ||
| Negative supply current | I- | -5 | 0.002 | μA | Full; VIN = 0 V or 12 V | 3 | |
| Ground current | IGND | -1 | 0.002 | μA | Full; VIN = 0 V or 12 V | 3 | |
| Analog signal range | VANALOG | -5 | 5 | V | Full; V+ = 5 V, V- = -5 V (dual supply table) | 4 | |
| Drain-source on-resistance RDS(on) | RDS(on) | 18 | 30 | Ω | Room; V+ = 5 V, V- = -5 V; IS = 10 mA, VD = ±3.5 V | 4 | |
| Drain-source on-resistance RDS(on) | RDS(on) | 37 | Ω | Full; V+ = 5 V, V- = -5 V; IS = 10 mA, VD = ±3.5 V | 4 | ||
| On-resistance match between channels | RDS(on) | 0.1 | 0.5 | Ω | Room; IS = 10 mA, VD = ±3.5 V | 4 | |
| Switch off leakage current IS(off) | IS(off) | -1 | 1 | nA | Room; V+ = 5.5, V- = -5.5 V; VD = ±4.5 V, VS = ±4.5 V | 4 | |
| Switch off leakage current IS(off) | IS(off) | -10 | 10 | nA | Full; V+ = 5.5, V- = -5.5 V; VD = ±4.5 V, VS = ±4.5 V | 4 | |
| Switch off leakage current ID(off) | ID(off) | -1 | 1 | nA | Room; V+ = 5.5, V- = -5.5 V; VD = ±4.5 V, VS = ±4.5 V | 4 | |
| Switch off leakage current ID(off) | ID(off) | -10 | 10 | nA | Full; V+ = 5.5, V- = -5.5 V; VD = ±4.5 V, VS = ±4.5 V | 4 | |
| Channel on leakage current ID(on) | ID(on) | -1 | 1 | nA | Room; V+ = 5.5 V, V- = -5.5 V; VS = VD = ±4.5 V | 4 | |
| Channel on leakage current ID(on) | ID(on) | -10 | 10 | nA | Full; V+ = 5.5 V, V- = -5.5 V; VS = VD = ±4.5 V | 4 | |
| Input current, VIN low | IIL | -1 | 0.05 | 1 | μA | Full; VIN under test = 0.8 V | 4 |
| Input current, VIN high | IIH | -1 | 0.05 | 1 | μA | Full; VIN under test = 2.4 V | 4 |
| Turn-on time | tON | 42 | 65 | ns | Room; RL = 300, CL = 35 pF, VS = ±3.5 V | 4 | |
| Turn-on time | tON | 75 | ns | Full; RL = 300, CL = 35 pF, VS = ±3.5 V | 4 | ||
| Turn-off time | tOFF | 34 | 45 | ns | Room; RL = 300, CL = 35 pF, VS = ±3.5 V | 4 | |
| Turn-off time | tOFF | 55 | ns | Full; RL = 300, CL = 35 pF, VS = ±3.5 V | 4 | ||
| Positive supply current | I+ | 0.002 | 1 | μA | Full; VIN = 0 V or 5 V | 4 | |
| Negative supply current | I- | -1 | -0.002 | μA | Room; VIN = 0 V or 5 V | 4 | |
| Negative supply current | I- | -5 | μA | Full; VIN = 0 V or 5 V | 4 | ||
| Ground current | IGND | -1 | -0.002 | μA | Full; VIN = 0 V or 5 V | 4 |
CAD (KiCad official)
- Symbol:
DG442LEDY-T1-GE3 - Footprint:
Package_SO:SOIC-16_3.9x9.9mm_P1.27mm - 3D model: SOIC-16 (KiCad packages3D, STEP)
- 3D model files:
dg442ledy-t1-ge3-etched.step/dg442ledy-t1-ge3-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);dg442ledy-t1-ge3.step/dg442ledy-t1-ge3.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Vishay Intertech datasheet (18 pp, sha256
c984e6651bfaea3d, retrieved 2026-10-19, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).