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DG442LEDQ-T1-GE3

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Vishay Intertech Analog Switches, Multiplexers, TSSOP-16. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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DG442LEDQ-T1-GE3

Vishay Intertech · Analog Switches, Multiplexers · TSSOP-16

DG442LEDQ-T1-GE3 from Vishay Intertech, in a TSSOP-16. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 IN1 input Digital logic input for switch 1, TTL/CMOS compatible with logic 0 at 0.8 V maximum and logic 1 at 2.4 V minimum; on DG442LE, logic 1 turns the switch on.
2 D1 passive Drain (analog) terminal of switch 1, which conducts equally well in both directions when on and blocks input voltages up to the supply levels when off.
3 S1 passive Source (analog) terminal of switch 1; signals beyond V+ or V- are clamped by internal diodes, so forward diode current must be limited to the maximum current ratings.
4 V- power_in Negative supply; dual supply operation is recommended at ±3 V to ±8 V, and V+ to V- must not exceed 18 V (absolute maximum -0.3 V to +18 V).
5 GND power_in Ground reference pin for the digital logic inputs.
6 S4 passive Source (analog) terminal of switch 4; signals beyond V+ or V- are clamped by internal diodes, so forward diode current must be limited to the maximum current ratings.
7 D4 passive Drain (analog) terminal of switch 4, which conducts equally well in both directions when on and blocks input voltages up to the supply levels when off.
8 IN4 input Digital logic input for switch 4, TTL/CMOS compatible with logic 0 at 0.8 V maximum and logic 1 at 2.4 V minimum; on DG442LE, logic 1 turns the switch on.
9 IN3 input Digital logic input for switch 3, TTL/CMOS compatible with logic 0 at 0.8 V maximum and logic 1 at 2.4 V minimum; on DG442LE, logic 1 turns the switch on.
10 D3 passive Drain (analog) terminal of switch 3, which conducts equally well in both directions when on and blocks input voltages up to the supply levels when off.
11 S3 passive Source (analog) terminal of switch 3; signals beyond V+ or V- are clamped by internal diodes, so forward diode current must be limited to the maximum current ratings.
12 NC unconnected No-connect pin, labeled NC in the pin configuration with no function stated in the datasheet.
13 V+ power_in Positive supply; single supply operation is 3 V to 16 V, and V+ to V- must not exceed 18 V (absolute maximum).
14 S2 passive Source (analog) terminal of switch 2; signals beyond V+ or V- are clamped by internal diodes, so forward diode current must be limited to the maximum current ratings.
15 D2 passive Drain (analog) terminal of switch 2, which conducts equally well in both directions when on and blocks input voltages up to the supply levels when off.
16 IN2 input Digital logic input for switch 2, TTL/CMOS compatible with logic 0 at 0.8 V maximum and logic 1 at 2.4 V minimum; on DG442LE, logic 1 turns the switch on.

Key specifications

Parameter Value
Manufacturer Vishay Intertech
Package TSSOP-16
Category Interface
Pins 16

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Analog Signal Range (single 12 V) VANALOG 0 12 V V+ = 12 V, V- = 0 V; Full 3
Drain-Source On-Resistance (single 12 V), Room RDS(on) 16 26 Ω V+ = 10.8 V, V- = 0 V; IS = 10 mA, VD = 2 V / 9 V; Room 3
Drain-Source On-Resistance (single 12 V), Full RDS(on) 35 Ω V+ = 10.8 V, V- = 0 V; IS = 10 mA, VD = 2 V / 9 V; Full 3
On-Resistance Match Between Channels (single 12 V), Room RDS(on) 0.1 0.5 Ω IS = 10 mA, VD = 9 V; Room 3
Switch Off Leakage Current IS(off) (single 12 V), Room IS(off) -1 1 nA VD = 1 V / 11 V, VS = 11 V / 1 V; Room 3
Switch Off Leakage Current IS(off) (single 12 V), Full IS(off) -10 10 nA VD = 1 V / 11 V, VS = 11 V / 1 V; Full 3
Switch Off Leakage Current ID(off) (single 12 V), Room ID(off) -1 1 nA VD = 1 V / 11 V, VS = 11 V / 1 V; Room 3
Switch Off Leakage Current ID(off) (single 12 V), Full ID(off) -10 10 nA VD = 1 V / 11 V, VS = 11 V / 1 V; Full 3
Channel On Leakage Current ID(on) (single 12 V), Room ID(on) -1 1 nA VS = VD = 11 V / 1 V; Room 3
Channel On Leakage Current ID(on) (single 12 V), Full ID(on) -10 10 nA VS = VD = 11 V / 1 V; Full 3
Input Current, VIN Low (single 12 V) IIL -1 0.01 1 μA VIN under test = 0.8 V; Full 3
Input Current, VIN High (single 12 V) IIH -1 1 μA VIN under test = 2.4 V; Full 3
Turn-On Time tON (single 12 V), Room tON 18 60 ns RL = 300 Ω, CL = 35 pF, VS = 5 V, see figure 2; Room 3
Turn-On Time tON (single 12 V), Full tON 70 ns RL = 300 Ω, CL = 35 pF, VS = 5 V, see figure 2; Full 3
Turn-Off Time tOFF (single 12 V), Room tOFF 18 35 ns RL = 300 Ω, CL = 35 pF, VS = 5 V, see figure 2; Room 3
Turn-Off Time tOFF (single 12 V), Full tOFF 45 ns RL = 300 Ω, CL = 35 pF, VS = 5 V, see figure 2; Full 3
Positive Supply Current I+ (single 12 V), Full I+ 0.03 1 μA VIN = 0 V or 12 V; Full 3
Negative Supply Current I- (single 12 V), Room I- -1 μA VIN = 0 V or 12 V; Room 3
Negative Supply Current I- (single 12 V), Full I- -5 0.002 μA VIN = 0 V or 12 V; Full 3
Ground Current IGND (single 12 V), Full IGND -1 0.002 μA VIN = 0 V or 12 V; Full 3
Analog Signal Range (dual ±5 V) VANALOG -5 5 V V+ = 5 V, V- = -5 V; Full 4
Drain-Source On-Resistance (dual ±5 V), Room RDS(on) 18 30 Ω V+ = 5 V, V- = -5 V; IS = 10 mA, VD = ± 3.5 V; Room 4
Drain-Source On-Resistance (dual ±5 V), Full RDS(on) 37 Ω V+ = 5 V, V- = -5 V; IS = 10 mA, VD = ± 3.5 V; Full 4
On-Resistance Match Between Channels (dual ±5 V), Room RDS(on) 0.1 0.5 Ω IS = 10 mA, VD = ± 3.5 V; Room 4
Switch Off Leakage Current IS(off) (dual ±5 V), Room IS(off) -1 1 nA V+ = 5.5 V, V- = -5.5 V; VD = ± 4.5 V, VS = ± 4.5 V; Room 4
Switch Off Leakage Current IS(off) (dual ±5 V), Full IS(off) -10 10 nA V+ = 5.5 V, V- = -5.5 V; VD = ± 4.5 V, VS = ± 4.5 V; Full 4
Switch Off Leakage Current ID(off) (dual ±5 V), Room ID(off) -1 1 nA V+ = 5.5 V, V- = -5.5 V; VD = ± 4.5 V, VS = ± 4.5 V; Room 4
Switch Off Leakage Current ID(off) (dual ±5 V), Full ID(off) -10 10 nA V+ = 5.5 V, V- = -5.5 V; VD = ± 4.5 V, VS = ± 4.5 V; Full 4
Channel On Leakage Current ID(on) (dual ±5 V), Room ID(on) -1 1 nA V+ = 5.5 V, V- = -5.5 V; VS = VD = ± 4.5 V; Room 4
Channel On Leakage Current ID(on) (dual ±5 V), Full ID(on) -10 10 nA V+ = 5.5 V, V- = -5.5 V; VS = VD = ± 4.5 V; Full 4
Input Current, VIN Low (dual ±5 V) IIL -1 0.05 1 μA VIN under test = 0.8 V; Full 4
Input Current, VIN High (dual ±5 V) IIH -1 0.05 1 μA VIN under test = 2.4 V; Full 4
Turn-On Time tON (dual ±5 V), Room tON 65 ns RL = 300 Ω, CL = 35 pF, VS = ± 3.5 V, see figure 2; Room 4
Turn-On Time tON (dual ±5 V), Full tON 75 ns RL = 300 Ω, CL = 35 pF, VS = ± 3.5 V, see figure 2; Full 4
Turn-Off Time tOFF (dual ±5 V), Room tOFF 45 ns RL = 300 Ω, CL = 35 pF, VS = ± 3.5 V, see figure 2; Room 4
Turn-Off Time tOFF (dual ±5 V), Full tOFF 55 ns RL = 300 Ω, CL = 35 pF, VS = ± 3.5 V, see figure 2; Full 4
Positive Supply Current I+ (dual ±5 V), Full I+ 0.002 1 μA VIN = 0 V or 5 V; Full 4
Negative Supply Current I- (dual ±5 V), Room I- -1 -0.002 μA VIN = 0 V or 5 V; Room 4
Negative Supply Current I- (dual ±5 V), Full I- -5 μA VIN = 0 V or 5 V; Full 4
Ground Current IGND (dual ±5 V), Full IGND -1 -0.002 μA VIN = 0 V or 5 V; Full 4
Analog Signal Range (single 5 V) VANALOG 5 V V+ = 5 V, V- = 0 V; Full 5
Drain-Source On-Resistance (single 5 V), Room RDS(on) 36 50 Ω V+ = 4.5 V; IS = 5 mA, VD = 1 V, 3.5 V; Room 5
Drain-Source On-Resistance (single 5 V), Full RDS(on) 75 Ω V+ = 4.5 V; IS = 5 mA, VD = 1 V, 3.5 V; Full 5
Turn-On Time tON (single 5 V), Room tON 53 70 ns RL = 300 Ω, CL = 35 pF, VS = 3.5 V, see figure 2; Room 5
Positive Supply Current I+ (single 5 V), Full I+ 10 100 μA VIN = 0 V or 5 V; Full 5
Analog Signal Range (single 3 V) VANALOG 0 3 V V+ = 3 V, V- = 0 V; Full 6
Drain-Source On-Resistance (single 3 V), Room RDS(on) 106 130 Ω V+ = 2.7 V, V- = 0 V; IS = 5 mA, VD = 0.5 V, 2.2 V; Room 6
Drain-Source On-Resistance (single 3 V), Full RDS(on) 140 Ω V+ = 2.7 V, V- = 0 V; IS = 5 mA, VD = 0.5 V, 2.2 V; Full 6
V+ to V- -0.3 18 V 2
GND to V- 18 V Label garbled in extracted text ('V GND to V-A 18') 2
Digital Inputs VS, VD -0.3 V GND -0.3 to (V+)+0.3 V, or 30 mA, whichever occurs first 2
Continuous Current (any terminal) 30 mA 2
Current, S or D (pulsed) 100 mA Pulsed 1 ms, 10 % duty cycle; unit cell blank in datasheet 2
Storage Temperature (DQ, DY suffix) -65 125 °C DQ suffix (TSSOP) 2
Power Dissipation, 16-pin TSSOP 450 mW Derate 7 mW/°C above 75 °C 2
ESD Human Body Model (HBM) 2500 V Per ANSI/ESDA/JEDEC JS-001 2
Latch Up Current 400 mA Per JESD78D 2
Supply Voltage, single supply (V+ to V-) V+ 3 16 V Single supply 1
Supply Voltage, dual supply (±) V± 3 8 V Dual supply, ± 3 V to ± 8 V (magnitude as printed) 1
Operating Temperature Range (D suffix, DQ package) TA -40 85 °C Ordering temp range -40 °C to +85 °C; D SUFFIX limits 2

CAD (KiCad official)

  • Symbol: DG442LEDQ-T1-GE3
  • Footprint: Package_SO:TSSOP-16_4.4x5mm_P0.65mm
  • 3D model: TSSOP-16 (KiCad packages3D, STEP)
  • 3D model files: dg442ledq-t1-ge3-etched.step / dg442ledq-t1-ge3-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); dg442ledq-t1-ge3.step / dg442ledq-t1-ge3.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Vishay Intertech datasheet (18 pp, sha256 c984e6651bfaea3d, retrieved 2026-10-18, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF