component

DG441LEDY-T1-GE3

Public Made by Adom

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Vishay Intertech Pre-ordered Chips, SOIC-16. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

componentcommunication interface chip-uart-485-232dg441ledy-t1-ge3factory-2.0.0extractor-text

Verified DG441LEDY-T1-GE3

by Ray · last 2 Nov 2026 · 1 record · files match
SymbolFootprint3D modelPins

Verification log 1 record

2 Nov 2026RayPublished by the parts factory: tier mfr, 16 pinsfiles match
SymbolFootprint3D modelPinsfor all variants
  • ✓component-page-verify: PASS
  • ✓cad_props: Datasheet, MPN and distributor properties match page.json
  • ✓component: DG441LEDY-T1-GE3 · SOIC-16 · 16 pins
  • ✓copper: 16 copper pads, none touching another net
  • ✓datasheet: all 16 pin names found in the 18-page datasheet
  • ✓distributor: lcsc C727832, digikey DG441LEDY-T1-GE3TR-ND, mouser 78-DG441LEDY-T1-GE3
  • ✓family: SOIC-16_3.9x9.9mm_P1.27mm
  • ✓files: 7 declared files present
  • ✓hero: docs/hero.png 4000x2500
  • ✓lbr: OK: /tmp/cpv-xo7r0wqb/x.lbr is a valid EAGLE .lbr with complete deviceset
  • ✓license: CC-BY-SA-4.0
  • ✓models_3d: 2 records
  • •package_fit (skip): no component.package_dims on the page: the model is unchecked against the datasheet drawing
  • ✓pads: 16 pins = 16 pads
  • ✓pose: 2 STEP(s) Z-up, seated, centred
  • ✓symbol: 16 pins agree
  • ✓visibility: public, source open
Evidencedatasheet
Verified files✓ dg441ledy-t1-ge3.kicad_sym✓ dg441ledy-t1-ge3.kicad_mod✓ dg441ledy-t1-ge3.step
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Generated by kicad-footprint-generator · KiCad file format 20260206
Name Last commit message Last updated
docs Publish 0.1.0 · Ray
viewers dg441ledy-t1-ge3: viewers · Ray
dg441ledy-t1-ge3-etched.glb Publish 0.1.0 · Ray
dg441ledy-t1-ge3-etched.step dg441ledy-t1-ge3: factory component page (tier=mfr) · Ray
dg441ledy-t1-ge3-hero.glb dg441ledy-t1-ge3: hero GLB from the etched model (keeps the MPN mark) · Ray
dg441ledy-t1-ge3-hero.overlay.json Publish 0.1.0 · Ray
dg441ledy-t1-ge3.glb Publish 0.1.0 · Ray
dg441ledy-t1-ge3.kicad_mod Publish 0.1.0 · Ray
dg441ledy-t1-ge3.kicad_sym Publish 0.1.0 · Ray
dg441ledy-t1-ge3.lbr Publish 0.1.0 · Ray
dg441ledy-t1-ge3.step Publish 0.1.0 · Ray
package.json Publish 0.1.0 · Ray
page.json Set visibility: public · Ray
README.md Publish 0.1.0 · Ray
verification.json Verified: Published by the parts factory: tier mfr, 16 pins · Ray

DG441LEDY-T1-GE3

Vishay Intertech · Pre-ordered Chips · SOIC-16

DG441LEDY-T1-GE3 from Vishay Intertech, in a SOIC-16. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 IN1 input Logic control input for switch 1; logic 0 is 0.8 V and logic 1 is 2.4 V, TTL and CMOS compatible.
2 D1 passive Drain terminal of switch 1; signals exceeding V+ or V- are clamped by internal diodes, so the current must be limited.
3 S1 passive Source terminal of switch 1; the switch conducts equally well in both directions when on and blocks input voltages up to the supply levels when off.
4 V- power_in Negative supply pin; single supply operation uses V- = 0 V with V+ from 3 V to 16 V, and dual supply ±3 V to ±8 V is recommended, with V+ to V- rated -0.3 V to +18 V.
5 GND power_in Ground reference pin for the digital logic inputs; the absolute maximum ratings list a GND to V- rating of 18 V.
6 S4 passive Source terminal of switch 4; the switch conducts equally well in both directions when on and blocks input voltages up to the supply levels when off.
7 D4 passive Drain terminal of switch 4; signals exceeding V+ or V- are clamped by internal diodes, so the current must be limited.
8 IN4 input Logic control input for switch 4; logic 0 is 0.8 V and logic 1 is 2.4 V, TTL and CMOS compatible.
9 IN3 input Logic control input for switch 3; logic 0 is 0.8 V and logic 1 is 2.4 V, TTL and CMOS compatible.
10 D3 passive Drain terminal of switch 3; signals exceeding V+ or V- are clamped by internal diodes, so the current must be limited.
11 S3 passive Source terminal of switch 3; the switch conducts equally well in both directions when on and blocks input voltages up to the supply levels when off.
12 NC unconnected No connection; the datasheet states no function for this pin.
13 V+ power_in Positive supply pin; single supply range 3 V to 16 V, with V+ to V- rated -0.3 V to +18 V.
14 S2 passive Source terminal of switch 2; the switch conducts equally well in both directions when on and blocks input voltages up to the supply levels when off.
15 D2 passive Drain terminal of switch 2; signals exceeding V+ or V- are clamped by internal diodes, so the current must be limited.
16 IN2 input Logic control input for switch 2; logic 0 is 0.8 V and logic 1 is 2.4 V, TTL and CMOS compatible.

Key specifications

Parameter Value
Manufacturer Vishay Intertech
Package SOIC-16
Category Communication Interface Chip/UART/485/232
Pins 16

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
V+ to V- -0.3 18 V 2
Digital Inputs -0.3 V VS, VD GND -0.3 to (V+)+0.3 or 30 mA, whichever occurs first 2
Continuous Current (any terminal) 30 mA 2
Storage Temperature (DQ, DY suffix) -65 125 °C 2
Power Dissipation 16-pin narrow body SOIC 650 mW Derate 7.6 mW/°C above 75 °C 2
ESD Human Body Model (HBM) 2500 V per ANSI/ESDA/JEDEC JS-001 2
Latch Up Current 400 mA per JESD78D 2
Analog Signal Range (single supply 12 V) VANALOG 0 12 V V+ = 12 V, V- = 0 V 3
Drain-Source On-Resistance (Full, single 12 V) RDS(on) 35 Ω V+ = 10.8 V, V- = 0 V, IS = 10 mA, VD = 2 V / 9 V 3
Drain-Source On-Resistance (Room, single 12 V) RDS(on) 16 26 Ω V+ = 10.8 V, V- = 0 V, IS = 10 mA, VD = 2 V / 9 V 3
Switch Off Leakage Current IS(off) (Full, single 12 V) IS(off) -10 10 nA VD = 1 V / 11 V, VS = 11 V / 1 V 3
Switch Off Leakage Current IS(off) (Room, single 12 V) IS(off) -1 1 nA VD = 1 V / 11 V, VS = 11 V / 1 V 3
Switch Off Leakage Current ID(off) (Full, single 12 V) ID(off) -10 10 nA VD = 1 V / 11 V, VS = 11 V / 1 V 3
Switch Off Leakage Current ID(off) (Room, single 12 V) ID(off) -1 1 nA VD = 1 V / 11 V, VS = 11 V / 1 V 3
Channel On Leakage Current ID(on) (Full, single 12 V) ID(on) -10 10 nA VS = VD = 11 V / 1 V 3
Channel On Leakage Current ID(on) (Room, single 12 V) ID(on) -1 1 nA VS = VD = 11 V / 1 V 3
Input Current, VIN Low (Full, single 12 V) IIL -1 0.01 1 μA VIN under test = 0.8 V 3
Input Current, VIN High (Full, single 12 V) IIH -1 1 μA VIN under test = 2.4 V 3
Turn-On Time (Full, single 12 V) tON 70 ns RL = 300, CL = 35 pF, VS = 5 V 3
Turn-On Time (Room, single 12 V) tON 18 60 ns RL = 300, CL = 35 pF, VS = 5 V 3
Turn-Off Time (Full, single 12 V) tOFF 45 ns RL = 300, CL = 35 pF, VS = 5 V 3
Turn-Off Time (Room, single 12 V) tOFF 18 35 ns RL = 300, CL = 35 pF, VS = 5 V 3
Positive Supply Current I+ (Full, single 12 V) I+ 0.03 1 μA VIN = 0 V or 12 V 3
Negative Supply Current I- (Full, single 12 V) I- -5 0.002 μA 3
Negative Supply Current I- (Room, single 12 V) I- -1 μA 3
Ground Current IGND (Full, single 12 V) IGND -1 0.002 μA 3
Analog Signal Range (dual ±5 V) VANALOG -5 5 V V+ = 5 V, V- = -5 V 4
Drain-Source On-Resistance (Full, dual ±5 V) RDS(on) 37 Ω V+ = 5 V, V- = -5 V, IS = 10 mA, VD = ± 3.5 V 4
Drain-Source On-Resistance (Room, dual ±5 V) RDS(on) 18 30 Ω V+ = 5 V, V- = -5 V, IS = 10 mA, VD = ± 3.5 V 4
Switch Off Leakage Current IS(off) (Full, dual ±5 V) IS(off) -10 10 nA V+ = 5.5, V- = -5.5 V, VD = ± 4.5 V, VS = ± 4.5 V 4
Switch Off Leakage Current IS(off) (Room, dual ±5 V) IS(off) -1 1 nA V+ = 5.5, V- = -5.5 V, VD = ± 4.5 V, VS = ± 4.5 V 4
Turn-On Time (Full, dual ±5 V) tON 75 ns RL = 300, CL = 35 pF, VS = ± 3.5 V 4
Turn-On Time (Room, dual ±5 V) tON 42 65 ns RL = 300, CL = 35 pF, VS = ± 3.5 V 4
Turn-Off Time (Full, dual ±5 V) tOFF 55 ns RL = 300, CL = 35 pF, VS = ± 3.5 V 4
Turn-Off Time (Room, dual ±5 V) tOFF 34 45 ns RL = 300, CL = 35 pF, VS = ± 3.5 V 4
Positive Supply Current I+ (Full, dual ±5 V) I+ 0.002 1 μA VIN = 0 V or 5 V 4
Negative Supply Current I- (Full, dual ±5 V) I- -5 μA 4
Negative Supply Current I- (Room, dual ±5 V) I- -1 -0.002 μA 4
Ground Current IGND (Full, dual ±5 V) IGND -1 -0.002 μA 4
Charge Injection (single 12 V) QINJ 6.6 pC VG = 0 V, Rg = 0, CL = 10 nF 3
Off Isolation (single 12 V) OIRR 68.4 dB RL = 50, CL = 5 pF, f = 1 MHz 3
Channel-to-Channel Crosstalk (single 12 V) XTALK 114 dB RL = 50, CL = 5 pF, f = 1 MHz 3
Source Off Capacitance (single 12 V) CS(off) 5 pF f = 1 MHz 3
Drain Off Capacitance (single 12 V) CD(off) 6 pF f = 1 MHz 3
Channel On Capacitance (single 12 V) CD(on) 15 pF f = 1 MHz 3

CAD (KiCad official)

  • Symbol: DG441LEDY-T1-GE3
  • Footprint: Package_SO:SOIC-16_3.9x9.9mm_P1.27mm
  • 3D model: SOIC-16 (KiCad packages3D, STEP)
  • 3D model files: dg441ledy-t1-ge3-etched.step / dg441ledy-t1-ge3-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); dg441ledy-t1-ge3.step / dg441ledy-t1-ge3.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Vishay Intertech datasheet (18 pp, sha256 c984e6651bfaea3d, retrieved 2026-11-02, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF